Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-05-03
2003-04-22
Yao, Lun-Yi (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S103000, C345S094000, C345S205000, C345S208000
Reexamination Certificate
active
06552705
ABSTRACT:
The present patent application claims the benefit of earlier Japanese Patent Application No. H11-130391 filed on May 11, 1999, the disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of driving a flat-panel display device such as a liquid crystal display device, and particularly, to a method of driving an active-matrix liquid crystal display device.
2. Description of the Related Art
Flat-panel display devices, in particular, liquid crystal display devices are light, thin, and low power consumption and are widely used. Among them, active-matrix liquid crystal display devices (AM-LCDs) employing switch elements for each pixel are popularly used in offices.
The switch elements used for AM-LCDs are mainly polysilicon TFTs. The AM-LCDs with polysilicon TFTs are capable of integrating drivers on a glass substrate of a liquid crystal panel, and therefore, are advantageous in simplifying wiring and reducing sizes.
In an AM-LCD with polysilicon TFTs, drivers integrated on a glass substrate of a liquid crystal (LC) panel are connected to an external driver through FPCs (flexible printed circuits). The external driver sends analog video data to the drivers on the LC panel. The analog video data is sampled through video bus lines and analog switches for data lines of the LC panel. The data lines hold video data, which is written into pixel electrodes of the LC panel through TFTs provided to the pixel portion.
The external driver sends analog video data to the driver on the LC panel at a speed of 40 MHz for SVGA (800×600 pixels), and 65 MHz for XGA (1024×768 pixels). These speeds are too fast for present polysilicon TFTs, and therefore, must be slowed down. To achieve this, one proposal divides a frame to be displayed on an LC panel into areas and simultaneously drive the areas. Another proposal divides a frame into areas, divides each of the areas into blocks each including “n” data lines, and simultaneously drives the areas while sequentially driving the blocks one after another in each. This proposal is capable of slowing down the operation speed of TFTs, than that proposal.
A method of driving an AM-LCD with polysilicon TFTs by dividing a frame into areas and each area into blocks will be explained. The example mentioned below divides each area into 32 blocks and sequentially drives the blocks from the block
1
toward the block
32
.
FIG. 1
is a timing chart showing the operation of the AM-LCD whose frame is divided into areas and each area into 32 blocks.
An external driver (not shown) receives video data (c), prepares video data (d) for each block, and sends the video data (d) to a data line driver on the LCD.
The video data (d) corresponds to video data (b) for one block. The video data (c) is asynchronous to the video data (d).
The external driver receives the video data (c) that includes, for example, red data R
249
to R
256
, green data G
249
to G
256
, and blue data B
249
to B
256
in series from, for example, a personal computer (PC). The external driver rearranges these data pieces, prepares the parallel video data (d) such as R
249
, G
249
, and B
249
to R
256
, G
256
, and B
256
, and supplies the video data (d) to the data line driver on the LCD. The details of the rearrangement of data pieces will be explained later.
The video data (d) is sent to, for example, the block
1
. Each block collectively receives its own video data, and the blocks in each area sequentially receive video data to fill a horizontal line in each area.
A horizontal scan period is consists of a write period (W) and a blanking period (B). The video data (b) is supplied to video bus lines in a write period (W) of a horizontal synchronous signal (a) that determines each horizontal scan period. The video bus lines are connected to data lines contained in the blocks of each area. In
FIG. 1
, the blocks
1
to
32
sequentially receive video data through the video bus lines during a write period (W). After a blanking period (B), the blocks
1
to
32
again receive data one after another. In each blanking period (B), video data is supplied which irrelevant to display.
The data lines and video bus lines has capacitance and resistance elements whose sizes vary due to manufacturing variations. These elements cause a video data transmission delay, i.e., a voltage delay. The voltage delay increases as a time constant in wiring increases. A large voltage delay prevents video data sampled for a data line from acquiring a required voltage. A shift register in the driver on the LCD involves manufacturing variations, and these variations also cause insufficient voltages on some data lines. When the blocks in each area are sequentially scanned, a block that is proximate to the boundary of the area, i.e., a first block to be driven at the start of a write period frequently receives insufficient voltages for video data sampled for the first block. This results in deteriorating the contrast of the block and making the boundary of the area noticeable.
A large voltage delay also causes a double sampling of video data to show a so-called ghost. The ghost frequently occurs in the last block in each area at the end of a write period.
When a horizontal line displays halftones on consecutive pixels and black on a last pixel, the horizontal line partly becomes white. When a horizontal line displays halftones on consecutive pixels and white on a last pixel, the horizontal line partly becomes black. These problems occur due to horizontal crosstalk and deteriorate the quality of display.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of driving a flat-panel display device that divides a frame into areas, capable of making boundaries among the areas unnoticeable and clearly displaying images on the display.
Another object of the present invention is to provide a method of driving a flat-panel display device, capable of preventing ghosts and displaying high-quality images on the display.
Still another object of the present invention is to provide a method of driving a flat-panel display device, capable of eliminating horizontal crosstalk and displaying high-quality images on the display.
In order to accomplish the objects, the present invention provides a method of driving a flat-panel display that consists of a first electrode substrate, a second electrode substrate, an optical modulation layer, a data line driver, a gate line driver, and an external driver. The first electrode substrate includes data lines, gate lines to form a matrix with the data lines, pixel electrodes formed at intersections of the data and gate lines, respectively, and switch elements provided for the pixel electrodes, respectively. Each of the switch elements is turned on and off by a gate signal passed through a corresponding one of the gate lines and connects, if turned on, a corresponding one of the data lines to the corresponding pixel electrode to write sampled video data on the data line into the pixel electrode. The second electrode substrate includes counter electrodes that face the pixel electrodes with a predetermined gap between them. The optical modulation layer is sandwiched between the first and second electrode substrates. The data line driver connects “n” of the data lines to video bus lines and samples video data for the n data lines in synchronization with a horizontal scan period. The gate line driver supplies a gate signal to one of the gate lines in synchronization with a horizontal scan period. The external driver converts external video data into video data for “n” of the data lines and collectively supplies the video data to the video bus lines. The method includes the steps of preparing, for each horizontal scan period, compensation data “A” whose voltages are substantially equal to those of video data to be supplied to the video bus lines at the start of a write period of the horizontal scan period in question, and supplying the compensation data “A” to the video bus lines during
Kabushiki Kaisha Toshiba
Yao Lun-Yi
LandOfFree
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