Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-09-24
2004-07-20
Shankar, Vijay (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S062000
Reexamination Certificate
active
06765547
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims the benefit of Korean Application No. 2000-60257, filed Oct. 13, 2000, in the Korean Industrial Property Office, the disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of driving a plasma display panel, and more particularly, to a method of driving an alternating current (AC) type triode surface-discharge plasma display panel by applying an AND logic driving method to an address-display separation driving method.
2. Description of the Related Art
The structures of plasma display panels are largely classified into a counter-discharge structure and a surface-discharge structure depending on the arrangement of discharging electrodes. In addition, methods of driving a plasma display panel are classified into a direct current (DC) driving method and an AC driving method depending on whether the polarity of a driving voltage changes or not.
Referring to
FIGS. 1A and 1B
, discharge spaces
16
are formed between front glass substrates
10
and
1
, and rear- glass substrates
20
and
2
in a plasma display panel of DC type counter-discharge structure and a plasma display panel of AC type surface-discharge structure, respectively. Referring to
FIG. 1A
, in the DC type plasma display panel, a scan electrode
18
and an address electrode
11
are directly exposed to the discharge space
16
. Referring to
FIG. 1B
, in the AC type plasma display panel, display electrodes
3
to perform display are disposed within a dielectric layer
5
so that the display electrodes
3
are electrically separated from the discharge space
16
. Here, display is performed by a well-known wall-charge effect. For example, in discharge cells where discharge is provoked between an address electrode
8
and a scan electrode
3
a,
wall charges are formed around the address electrode
8
and the scan electrode
3
a.
Thereafter, a voltage lower than a discharge triggering voltage is applied between the line of the scan electrode
3
a
and the line of a common electrode
3
b
so that display can be performed only in discharge cells where wall charges are formed around the scan electrode
3
a.
Reference numeral
5
′ denotes a dielectric layer covering the address electrode
8
.
Referring to
FIG. 2
, the address electrode lines
8
, the dielectric layers
5
and
5
′, the X-Y electrode lines
3
, barriers
6
and a magnesium monoxide (MgO) layer
9
as a protective layer are provided between the front glass substrate
1
and the rear glass substrate
2
in a conventional AC type triode surface-discharge plasma display panel. Reference numeral
4
denotes a metal electrode line to increase the conductivity of each X-Y electrode line
3
. Each X-Y electrode line
3
includes a scan electrode
3
a
and a common electrode
3
b
as shown in FIG.
1
B.
The parallel address electrode lines
8
are formed on a top surface of the rear glass substrate
2
. The rear dielectric layer
5
′ is deposited on the entire surface of the rear glass substrate
2
having the address electrode lines
8
. The barriers
6
are formed on the surface of the rear dielectric layer
5
′ such that the barriers
6
are parallel to the address electrode lines
8
. The barriers
6
define the discharge areas of discharge cells and prevent optical crosstalk between adjacent discharge cells. A phosphor layer
7
is formed between adjacent pairs of the barriers
6
. The phosphor layer
7
generates light having a color (red, green, or blue) corresponding to ultraviolet rays generated due to the discharge of each discharge cell.
The X-Y electrode lines
3
are formed on a bottom surface of the front glass substrate
1
in a direction perpendicular to a direction of the address electrode lines
8
. The discharge cells are defined at intersections of the X-Y electrode lines
3
and the address electrode lines
8
. The front dielectric layer
5
is deposited on the entire bottom surface of the front glass substrate
1
having the X-Y electrode lines
3
. The MgO layer
9
, which protects a display panel from an intensive electric field, is deposited on the entire surface of the front dielectric layer
5
. Gas (not shown) used to form a plasma is sealed in the discharge space
16
.
FIG. 3
illustrates a typical address-display separation driving method for the AC type triode surface-discharge plasma display panel of FIG.
2
.
FIG. 4
illustrates the interactions between the X-Y electrode lines
3
and the address electrode lines
8
used to perform in the driving method of
FIG. 3
in the plasma display panel of FIG.
2
. Referring to
FIGS. 3 and 4
, a unit frame (i.e., a unit television field) is divided into 6 sub-fields SF
1
through SF
6
to realize time division gray-scale display. In addition, each of the sub-fields SF
1
through SF
6
is divided into corresponding address periods A
1
through A
6
and sustain periods S
1
through S
6
. During each of the address periods A
1
through A
6
, a display data signal is applied to address electrode lines A
R1
, . . . , A
B5
, and simultaneously, corresponding scan pulses are sequentially applied to Y electrode lines Y
1
through Y
16
. Accordingly, when the display data signal of a high level is applied while scan pulses are being applied, wall charges are formed in the corresponding discharge cells due to the address discharge. In the discharge cells other than the corresponding discharge cells, wall charges are not formed.
During each of the sustain periods S
1
through S
6
, a display pulse is alternately applied to all the Y electrode lines Y
1
through Y
16
and all the X electrode lines X
1
through X
16
so that a display is performed in the discharge cells having the wall charges. Therefore, the luminance of a plasma display panel is proportional to the time of the sustain periods S
1
through S
6
in a unit television field.
Here, the sustain period S
1
of the first sub-field SF
1
is set to a time 1T corresponding to
2
0
. The sustain period S
2
of the second sub-field SF
2
is set to a time 2T corresponding to
2
1
. The sustain period S
3
of the third sub-field SF
3
is set to a time 4T corresponding to
2
2
. The The sustain period S
4
of the fourth sub-field SF
4
is set to a time 8T corresponding to
2
3
. The sustain period S
5
of the fifth sub-field SF
5
is set to a time 16T corresponding to
2
4
. The sustain period S
6
of the sixth sub-field SF
6
is set to a time 32T corresponding to
2
5
. Consequently, among the 6 sub-fields SF
1
through SF
6
, a sub-field to be displayed can be appropriately selected so that gray-scale display can be performed.
FIGS. 5A through 5E
illustrate the driving signals in the unit sub-field SF
1
according to the address-display separation driving method of FIG.
3
. Here, it is assumed that a plasma display panel to which the driving method of
FIG. 5
is applied has n red (R) address electrode lines, n green (G) address electrode lines, n blue (B) address electrode lines, and 480 pairs of the X and Y electrode lines. In
FIGS. 5A through 5E
, reference character S
AR1, . . . , ABn
denotes a driving signal applied to the address electrode lines A
R1
, A
G1
, . . . , A
Gn
, A
Bn
, reference character S
X1, . . . ,X480
denotes a driving signal applied to the corresponding X electrode lines X
1
through X
480
, and reference character S
Y1, . . . ,Y480
denotes a driving signal applied to the corresponding Y electrode lines Y
1
through Y
480
. Referring to
FIGS. 5A through 5E
, the address period A
1
in the unit sub-field SF
1
is divided into reset periods A
11
, A
12
and A
13
and a main address period A
14
.
During the sustain period S
1
, a display pulse
25
is alternately applied to all the Y electrode lines Y
1
through Y
480
and all the X electrode lines X
1
through X
480
so that the display is performed in the discharge cells having the wall charges formed during the corresponding address period A
1
. When a final pulse is applied to the
McGuireWoods LLP
Patel Nitin
Samsung SDI & Co., Ltd.
Shankar Vijay
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