Facsimile and static presentation processing – Static presentation processing
Reexamination Certificate
2005-09-22
2010-10-26
Poon, King Y (Department: 2625)
Facsimile and static presentation processing
Static presentation processing
C358S001900, C358S001150, C718S105000
Reexamination Certificate
active
07821656
ABSTRACT:
A drawing processing circuit includes a plurality of rasterizing means capable of executing rasterizing processes in parallel. Each rasterizing means includes a dynamic reconfigurable processor. Data described by a page description language is received, analyzed, and converted into intermediate data for each drawn object. Before execution of a rasterizing process, scheduling data of reconfiguration of the processor is generated by estimating the process time of each rasterizing process on the basis of the intermediate data. The plurality of rasterizing means rasterize the data to bitmap data on the basis of the intermediate data while reconfiguring the processor on the basis of the generated scheduling data. In addition, the process time of each of the plurality of rasterizing means is determined on the basis of the scheduling data. The scheduling data is corrected so as to make the process times of the plurality of rasterizing means substantially equal. With this arrangement, a method of drawing image, which reduces the waste of hardware resources and perform a high-speed drawing process, a circuit thereof, and a print control apparatus are provided.
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JPO translation of the Japanese Official Communication, dated Aug. 14, 2009, regarding application No. 2004-275029.
Japanese Official Communication, dated Aug. 14, 2009, regarding Application No. 2004-275029.
Ito Nobuyasu
Tachikawa Tomohiro
Canon Kabushiki Kaisha
Cheng Peter L
Fitzpatrick ,Cella, Harper & Scinto
Poon King Y
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