Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1996-03-28
1998-07-14
Chaudhari, Chandra
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438445, 438524, H01L 21761
Patent
active
057803536
ABSTRACT:
Formation of parasitic edge transistors at upper edges of trenches formed on a substrate of an integrated circuit is suppressed by implanting dopants into trench regions of the IC substrate before the trenches are formed in the trench regions by reactive ion etching. The widths of the trenches formed in the trench regions are narrower than the widths of the doped regions of the trench regions. The doped regions of the trench regions are formed by first implanting dopants into the trench regions and then heat treating the implanted regions to activate the dopants and to diffuse the dopants laterally from the implanted regions.
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Advanced Micro Devices , Inc.
Chaudhari Chandra
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