Method of displaying a logic signal

Details Method of displaying a logic signal Method of displaying a logic signal

1982-12-10

1986-08-26

Gruber, Felix D.

Boots, shoes, and leggings

235310, 364481, 382 56, G06F 15626, G06F 500

Patent

active

046086528

ABSTRACT:
A digital logic signal characterized by a bit sequence is displayed on a raster scan type screen in compressed form. The bit sequence is divided into N+1 bit segments and each bit of each segment, excluding the first bit of each segment, is compared to its preceding bit on a bit-by-bit, segment-by-segment basis. If a bit matches its preceding bit, a bit matching the preceding bit is generated. If a bit does not match its preceding bit, a bit opposite in state to the last bit produced is generated. The generated bits thus comprise a compressed sequence of N bit segments each corresponding to one N+1 bit segment of the original data sequence. A compressed waveform based on the generated sequence is then displayed.

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Electronics, Sep. 13, 1979 (vol 52, No. 19), "When Logic Analyzers Meet Development System", B. Farly, pp. 141-146.

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