Method of die burn-in

Details Method of die burn-in Method of die burn-in

1995-01-09

1996-02-06

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 51, 437226, 148DIG162, G01R 3126, H01L 2166

Patent

active

054895383

ABSTRACT:
The present invention provides for a burn-in test which is conducted on the wafer level, before the dies are separated into individual chips and packaged. In a preferred embodiment of the invention, a series of chips are each connected to an external current, ground, and/or alternate signal source(s) for burn-in. Generally, the method herein for a burn-in of a semiconductor die comprises the step of: (a) providing an electrical connection between a die on a semiconductor wafer and an external current source; (b) heating the semiconductor wafer; and (c) applying a common signal across the electrical connection to burn in the die. A preferred method herein provides a semiconductor wafer including a multiplicity of dies and wafer level test points, at least one layer of conductive lines overlying the semiconductor wafer, a means for connecting an individual conductive line to a test point on the wafer; and a means for connecting the conductive lines to an external signal source for exercising the dies.

REFERENCES:
patent: 3984860 (1976-10-01), Logue
patent: 4703436 (1987-10-01), Varshney
patent: 4778771 (1988-10-01), Hiki
patent: 4974049 (1990-11-01), Sueda et al.
patent: 5047711 (1991-09-01), Smith et al.
patent: 5103557 (1992-04-01), Leedy
patent: 5219765 (1993-06-01), Yoshida et al.

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