Method of detecting the width of spacers and lightly doped drain

Details Method of detecting the width of spacers and lightly doped drain Method of detecting the width of spacers and lightly doped drain

1989-02-22

1991-04-23

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 8, 437 41, H01L 2166

Patent

active

050100297

ABSTRACT:
A process for fabricating field effect transistors with lightly doped drain (LDD) regions having a selected width includes a method of optically detecting the width of spacers used to mask the LDD regions during the source and drain implant and a method of electrically determining (confirming) the width of the LDD regions. In the optical method, reference structures are formed concurrently with the fabrication of the gates for FETs, a spacer material is formed on the substrate, the gates and the reference structures, the spacer material is etched away and the width of the spacers is optically detected by aligning the edges of spacers extending from two reference structures separated by a known distance. In the electrical method, the width is determined by defining a test area with known dimension, forming both N.sup.+ and N.sup.- regions in the test area, measuring the resistance across the test area, calculating the resistance of the N.sup.+ and N.sup.- regions, and calculating the width of the N.sup.- region from the resistance of the N.sup.- region.

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Tsang et al., "Fabrication of High-Performance LDD FETs with Oxide Sidewall-Spacer Technology", IEEE Trans. on Electron Devices, vol. ED-29, No. 4, Apr. 1982, pp. 590-596.
Bril et al., "Electrical Measurements of Sidewall Spacer Dimensions", Proc. SPIE Int. Soc. Opt. Eng., 1985, vol. 565, pp. 117-120.
Huang, "Using the Cross-Bridge Structure to Monitor the Effective Oxide Sidewall-Spacer Width in LDD Transistors", IEEE Electron Device Letters, vol. EDL-9, No. 5, May 1985, pp. 208-210.

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