Method of detecting internal frame skips by MPEG video decoders

Details Method of detecting internal frame skips by MPEG video decoders Method of detecting internal frame skips by MPEG video decoders

2005-10-04

2005-10-04

Rao, Andy (Department: 2613)

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

C375S240260

Reexamination Certificate

active

06952452

ABSTRACT:
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to (i) generate a random number signal, (ii) read a data signal, and (iii) generate one or more control signals. The second circuit may be configured to (i) store the random number signal, (ii) receive and store a decoded video signal, and (iii) present the data signal. The first circuit may be further configured to compare the data signal with the random number signal and (i) when the data signal matches the random number signal generate a first of the control signals and (ii) when the data signal fails to match the random number signal generate a second of the control signals.

REFERENCES:
patent: 5973744 (1999-10-01), Kim
patent: 6546065 (2003-04-01), Shimosakoda
patent: 6591396 (2003-07-01), Honda
patent: 2002/0146071 (2002-10-01), Liu et al.
Gareth Trevers et al., “Method and/or Architecture of Implementing MPEG Frame Display Using Four Frame Stores”, U.S. Appl. No. 10/137,015, filed May 2, 2002.

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