Method of detecting error correction devices on plug-compatible

Excavating

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

371 372, 371 404, 371 491, 371 371, 395157, 395166, 364518, G06F 1100

Patent

active

058810722

ABSTRACT:
According to the preferred embodiment, a method is provided to electronically detect the presence of error correcting memory modules in a computer system in an easy and efficient manner. The method forces an error in the memory system and detects whether there is an error reporting output on the error active line. In the preferred method, the memory refresh for the memory system is turned off for a period of time sufficient to introduce errors in the memory. Then, a read is done while monitoring the error active line. If any bank of memory has an error line active go active during a read, than an error correcting memory module is installed. If not, than a standard memory module is installed.

REFERENCES:
patent: 4761783 (1988-08-01), Christensen et al.
patent: 4821271 (1989-04-01), Kini et al.
patent: 4955024 (1990-09-01), Pfeiffer et al.
patent: 4972345 (1990-11-01), Munier et al.
patent: 4985844 (1991-01-01), Pfeiffer et al.
patent: 5036514 (1991-07-01), Downes et al.
patent: 5058115 (1991-10-01), Blade et al.
patent: 5099500 (1992-03-01), Furlong
patent: 5129060 (1992-07-01), Pfeiffer et al.
patent: 5146592 (1992-09-01), Pfeiffer et al.
patent: 5235602 (1993-08-01), Klim
patent: 5274646 (1993-12-01), Brey et al.
patent: 5287364 (1994-02-01), Kimura
patent: 5379304 (1995-01-01), Dell et al.
patent: 5450422 (1995-09-01), Dell
patent: 5452429 (1995-09-01), Fuoco et al.
patent: 5465262 (1995-11-01), Dell et al.
patent: 5469559 (1995-11-01), Parks et al.
patent: 5488691 (1996-01-01), Fuoco et al.
patent: 5553231 (1996-09-01), Papenberg et al.
Pescatore, J.C. and Cooper, R.J., "Pseudo-Cache-Based Architecture", IBM Technical Disclosure Bulletin, vol. 34 No. 7A, Dec. 1991, pp. 481-485.
Scott, E.K. and Wong, B.B. "Synchronizing Error Reporting and Recovery", IBM Technical Disclosure Bulletin, vol. 29 No. 2, Jul. 1986, p. 570.
Aldereguia, A., Comer, D., and Diokno, R., "Swapping Failing Bits in 40-Pin Error Correcting SIMMS", IBM Technical Disclosure Bulletin, vol. 37 No. 09, Sep. 1994, pp. 595-596.
Hunter, S.W. and Stacy, J.K., "Unique Method for Reporting Errors Detected/Corrected by ECC Circuitry", IBM Technical Disclosure Bulletin, vol. 36 No. 09A, Sep. 1993, pp. 563-564.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of detecting error correction devices on plug-compatible does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of detecting error correction devices on plug-compatible , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of detecting error correction devices on plug-compatible will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1328726

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.