Method of designing semiconductor integrated circuit having...

Details Method of designing semiconductor integrated circuit having... Method of designing semiconductor integrated circuit having...

2009-01-30

2011-12-27

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S108000, C716S109000, C716S113000, C716S114000, C716S133000

Reexamination Certificate

active

08086984

ABSTRACT:
A power noise cycle is obtained from a dynamic IR drop analysis and a delay of a delay pass is a multiple of the noise cycle. Thereby, a delay increment and a delay decrement of a power noise amount (delay time×power noise amplitude) received when an internal signal of the semiconductor integrated circuit passes through a delay pass circuit are approximately the same.

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“Voltagestorm power and Power Rail Verification Datasheet”, pp. 1-4, Cadence, @2006.
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“Method For Converging Timing In Consideration Of Signal Integrity” OKI Technical View No. 196, vol. 70, No. 4, pp. 50-51, Oct. 2003.

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