Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – For fault location
Reexamination Certificate
2011-04-26
2011-04-26
He, Amy (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
For fault location
C324S071400
Reexamination Certificate
active
07932726
ABSTRACT:
A method of improving the clean, rinse and dry processes during the manufacture of ICs, MEMS and other micro-devices to conserve solution and energy while completing the process within a specified time. An electro-chemical residue sensor (ECRS) provides in-situ and real-time measurement of residual contamination on a surface or inside void micro features within the sensor representative of conditions on production wafers. The measured impedance can be used to determine what process variables and specifically how process conditions affect the rate of change of the measured impedance. The in-situ measurements are used to design and optimize a production process and/or to monitor the production run in real-time to control the process conditions and transfer of a patterned wafer through the processes.
REFERENCES:
patent: 5861754 (1999-01-01), Ueno et al.
patent: 6145384 (2000-11-01), Ikeda et al.
patent: 6294063 (2001-09-01), Becker et al.
patent: 6437551 (2002-08-01), Krulevitch et al.
patent: 6703819 (2004-03-01), Gascoyne et al.
patent: 6903918 (2005-06-01), Brennan
patent: 2003/0156998 (2003-08-01), Gilligan et al.
patent: 2004/0245580 (2004-12-01), Lin
K. Romero “in-situ analysis of wafer surface and deep trench rinse,” Cleaning Technology in Semiconductor Device Manufacturing VI, The Electrochemical Society, 2000.
A.D. Hebda “Fundamentals of UPW rinse: analysis of chemical removal from flat and patterned wafer surfaces” Cleaning Technology in Semiconductor Device Manufacturing VI, 2000.
J. Yan “Test Structures for Analyzing Mechanisms of Wafer Chemical Contaminant Removal” IEEE Int Conf on Microelectronic Test Structures pp. 209-213, Mar. 2003.
J. Yan “Sensor for Monitoring the Rinsing of Patterned Wafers” IEEE Trans on Semiconductor Manufacturing, vol. 17 No. 4 Nov. 2004 pp. 531-537.
R. P. Ciarello “Optimization of post sulfuric acid/hydrogen peroxide dump rinsing process” Proc. Materials Research Soc. Symp., vol. 477, 1997, pp. 533-538.
Thomas Roche et al “Water use efficiency in immersion wafer rinsing” Mat. Res. Soc. Symp. Proc vol. 477 1997, pp. 527-532.
Shadman Farhang F.
Vermeire Bert M.
Environmental Metrology Corporation
Gifford Eric A.
He Amy
LandOfFree
Method of design optimization and monitoring the... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of design optimization and monitoring the..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of design optimization and monitoring the... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2684867