Method of deriving a primary clock from secondary signals in a d

Details Method of deriving a primary clock from secondary signals in a d Method of deriving a primary clock from secondary signals in a d

1991-02-06

1992-12-29

Harvey, Jack B.

Electricity: measuring and testing

Internal-combustion engine ignition system or device

Electronic ignition system

324402, 324393, F02P 1700

Patent

active

051755017

ABSTRACT:
An interface for coupling an engine analyzer to an engine having a distributorless ignition system includes a pair of pickup clamps for coupling signals from respective groups of spark plug wires. A logic cell array is supplied with spark plug secondary voltage polarity and pattern information, corresponding to an engine under test from a ROM. The technician is instructed as to which wires to place in each clamp. A semiconductor input switch is controlled by the logic cell array to sort the secondary voltages from the pickup clamps according to polarity. The real and the wasted sparks are then determined based upon the magnitude of the signals from the input switch. The apparatus permits a "rapid test" (of secondary voltages only) by developing a pseudo #1 primary clock from the pickup clamp signals. A CPU in the interface is controllable by an external computer or by an operator keypad. A vehicle "personality" module interfaces the logic cell array with the voltage levels on a connector of a corresponding vehicle.

REFERENCES:
patent: 4847563 (1989-07-01), Sniegowski et al.
patent: 4937527 (1990-06-01), Saniegowski et al.
patent: 5068613 (1991-11-01), Kreft et al.

Affiliated with

Also associated with

Rating

Method of deriving a primary clock from secondary signals in a d does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of deriving a primary clock from secondary signals in a d, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of deriving a primary clock from secondary signals in a d will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1890201