Method of deposition of silicon in fine crystalline form

Coating processes – Electrical product produced – Welding electrode

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423349, 423350, 427 86, C01B 3302

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042554632

ABSTRACT:
Method of deposition of silicon in fine crystalline form upon a substrate from a silicon-containing reaction gas which includes, at a set mole ratio of the reaction gas and throughput selected for the deposition process, setting the deposition rate-determining temperature of the substrate, at the beginning of deposition, at a temperature lower than optimal temperature for deposition of silicon thereon, maintaining the lower than optimal temperature during a first deposition phase, thereafter raising the temperature of the substrate to the optimal temperature while maintaining the other parameters determining the rate of deposition, and maintaining the optimal temperature for the remainder of the deposition.

REFERENCES:
patent: 3120451 (1964-02-01), Schmidt et al.
patent: 3496037 (1970-02-01), Jackson et al.
patent: 4087571 (1978-05-01), Kamins et al.

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