Method of depositing silicon films with reduced structural defec

Details Method of depositing silicon films with reduced structural defec Method of depositing silicon films with reduced structural defec

1984-07-30

1986-07-01

Smith, John D.

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

427 86, 134 2218, 134 37, B08B 900

Patent

active

045979898

ABSTRACT:
Silicon films in integrated circuits are mass produced with reduced structural defects by passing a reactant gas which contains silicon over a batch of wafers in a quartz chamber to deposit a silicon substance on both the wafers in a quartz chamber and the quartz walls of the chamber; repeating the passing step on other batches of wafers until the thickness of the silicon substance on the quartz walls exceeds a predetermined limit; directing a forceful stream of gas against the quartz walls to knock microscopic particles of the silicon substance therefrom; removing the knocked-off microscopic particles from the chamber; and continuing the passing and repeating steps with no intervening acid etch of the silicon substance on the quartz walls.

REFERENCES:
patent: 4138306 (1979-02-01), Niwa
patent: 4500492 (1985-02-01), Yamakawa

Affiliated with

Also associated with

Rating

Method of depositing silicon films with reduced structural defec does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of depositing silicon films with reduced structural defec, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of depositing silicon films with reduced structural defec will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1082077