Method of creating an enhanced BGA attachment in a...

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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Details

C029S840000, C029S830000, C029S825000, C029S846000, C029S852000, C438S613000, C438S616000, C438S617000

Reexamination Certificate

active

06408511

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to computer chips, and more particularly to ball grid arrays for attaching computer chips.
2. Description of the Related Art
Conventionally, electronic circuit components, including silicon chips, have been mounted on printed circuit boards. More recently, in order to reduce the size associated with conventional printed circuit boards, low-temperature co-fired ceramic (LTCC) substrates have been used.
A typical LTCC configuration comprises multiple layers of ceramic “tape” which are used to provide the base structure upon which to form various electronic components and electrical connections. The tape is formed from a powdered ceramic, mixed with a binder. For example, one type of ceramic tape available from Dupont is known as “Green Tape 951.” The electronic components that can be formed include resistors, capacitors, inductors, and the like. The electrical connections, formed through each tape layer are known as “vias.” The components are formed by punching holes in the tape as appropriate, and layering on metal, dielectrics, insulators, etc. Several layers of tape may be used in order to form the desired circuitry. The tape layers are then pressed together and fired in an oven to remove the binder and to sinter the ceramic powder. Components which are too large or too difficult to form within the ceramic tape layers, such as silicon chips, may be surface mounted on the hardened substrate. The resulting substrate is usually less than 1″×1″ thus providing a compact circuit package.
U.S. Pat. No. 5,442,852, entitled “Method of Fabricating Solder Ball Array”, by Paul Danner, discloses a method of forming a ball grid array on a ceramic substrate. To facilitate discussion,
FIG. 1
shows an example of solder ball
100
being mounted on a ceramic substrate
104
. A via
108
filled with an electrically conductive material may pass through the ceramic substrate
104
. A termination pad
112
of an electrically conductive material may be placed over the via
108
to provide an electrical connection with the via
108
. A dielectric tape
116
having holes matching the placement of the termination pads
116
on the ceramic substrate
104
may be mounted on the surface of the ceramic substrate
104
with the termination pad
116
. The ceramic substrate
104
and dielectric tape
116
may be fired together. The solder ball
100
may be placed in the hole(s) in the dielectric tape
116
. After the solder balls
100
are placed, the solder balls
100
may be reheated to reflow the solder balls
100
so that the solder balls
100
fill the volume created by the hole in the dielectric tape
116
and bonds with the termination pad
112
, as shown in FIG.
2
. The solder balls may be used as a ball grid array. Such ball grid arrays are subject to thermal stress and other environmental factors, which may cause a mechanical or electrical connection failure where the solder ball is connected to the termination pad.
It would thus be desirable to provide an enhanced ball grid array attachment between the solder balls and the termination pad.
SUMMARY OF THE INVENTION
In general, the present invention provides a method of forming a substrate with a ball grid array. Generally, a plurality of termination cups is formed on the substrate. A plurality of diffusion barriers is formed where each diffusion barrier is over a termination cup. Electrically conductive balls are then connected to the diffusion barriers.
These and other features of the present invention will be described in more detail below in the detailed description of the invention and in conjunction with the following figures.


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patent: 5302219 (1994-04-01), Hargis
patent: 5442852 (1995-08-01), Danner
patent: 5611884 (1997-03-01), Bearinger et al.
patent: 5637832 (1997-06-01), Danner
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patent: 6341417 (2002-01-01), Gupta et al.

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