Patent
1996-09-24
1998-06-16
Beausoliel, Jr., Robert W.
39518214, G06F 1100, G06F 1114
Patent
active
057684944
ABSTRACT:
In order to effectively avoid faulty or false read error corrections in a digital data processing system, a check is made to see if the number of data read retrials reaches a preset number whose value is less than the maximum number of data read retrials. This checking limits the number of routine runs which can pass through an execution step wherein a check for an uncorrectable error is conducted, to a value which is markedly lower than that of the prior art. Further, if the routine passes once through a flag setting step wherein a flag is set to a preset logic level in the event that an error correcting length exceeds a length of data retrieved from a memory, all checking for uncorrectable errors is by-passed. Hence, the possibility that an uncorrectable error will be erroneously detected an a correctable one is greatly reduced or eliminated.
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Beausoliel, Jr. Robert W.
NEC Corporation
Vales P.
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