Semiconductor device manufacturing: process – Chemical etching
Reexamination Certificate
2007-06-19
2007-06-19
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Reexamination Certificate
active
10710622
ABSTRACT:
A method of correcting a lithographic process is provided. A physical vapor deposition process (PVD) is performed to deposit a film on a wafer. The asymmetrical deposition of the film on the sidewalls of an opening is related to the change of target consumption in the PVD process. Therefore, the positional shift in an overlay mark may change each time. However, a formula relating target consumption with the degree of positional shift can be derived. The formula is recorded by a controller system. A compensation value can be obtained from the controller system and fed back in a subsequent lithographic process. Thereafter, a photoresist layer is formed on the film and a lithographic process is performed to pattern the photoresist. Since the compensation value can be fed back in the lithographic process via the controller system to correct for the positional shift in the overlay mark resulting from target consumption in the PVD process, errors in measuring the overlay mark can be reduced.
REFERENCES:
patent: 2003/0064422 (2003-04-01), McDevitt et al.
patent: 2004/0058540 (2004-03-01), Matsumoto et al.
patent: 2004/0197939 (2004-10-01), Clark
Jianq Chyun IP Office
Lebentritt Michael
ProMOS Technologies Inc.
Stevenson Andre′
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