Coded data generation or conversion – Phase or time of phase change – Synchro or resolver signal
Reexamination Certificate
1999-09-15
2001-08-21
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Phase or time of phase change
Synchro or resolver signal
C341S116000
Reexamination Certificate
active
06278388
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital conversion method for an analog signal and, more particularly, to an improvement in conversion performances (stability, high-speed performance, and noise resistance) by converting a first output signal sin(&thgr;−&phgr;)·f(t) into a digital signal by positive
egative sign determination performed by a comparator when sin(&thgr;−&phgr;) is calculated as an error deviation &egr; and a novel improvement for advantaging formation of a monolithic IC by reducing analog circuits in number.
2. Description of the Related Art
As a conventionally used digital conversion method for an analog signal of this type, for example, a tracking method shown in
FIG. 1
is popularly used. More specifically, as shown in
FIG. 1
, reference numeral
1
denotes a resolver excited by an exciting signal (i.e., reference signal) E·sin &ohgr;t. Two-phase outputs KEsin &thgr;sin &ohgr;t and KEcos &thgr;sin &ohgr;t output from the resolver
1
are operated by an operation unit
2
, and a two-phase output signal KEsinwtsin(&thgr;−&phgr;) (where &thgr; is a resolver rotation angle, and &phgr; is an output counter value) output from the operation unit
2
is synchronously rectified by a synchronous rectifier
3
to which the exciting signal E·sin &ohgr;t is input.
An output signal KEsin(&thgr;−&phgr;) obtained from the synchronous rectifier
3
is input to a counter
5
as a pulse output
4
a
through a voltage controlled oscillator
4
, in order to obtain an output counter value &phgr; serving as a digital angle output from the counter
5
.
The output counter value &phgr; is fed back, and thus a feed back loop is formed. Therefore, a velocity signal
6
is obtained by the output signal KEsin(&thgr;−&phgr;) from the synchronous rectifier
3
, and a position signal
7
can be obtained from the output counter value &phgr; of the counter
5
.
The conventional digital conversion method for an analog signal has the configuration described above, the following problem is posed.
More specifically, since each constituent portion in the circuit configuration described above is partially constituted by a complex analog configuration, the entire configuration cannot be easily formed by an integrated monolithic semiconductor, and an exciting circuit or the like is inevitably added as a discrete part. For this reason, a low price, a reduction in size and weight, high reliability, and utility cannot be easily achieved. In addition, a preferable improvement means for a tracking speed is not found.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above problem, and has as its object to, more particularly, a digital conversion method for an analog signal in which an improvement in conversion performances (stability, high-speed performance, and noise resistance) by converting a first output signal sin(&thgr;−&phgr;)·f(t) into a digital signal by positive
egative sign determination performed by a comparator when sin(&thgr;−&phgr;) is calculated as an error deviation e and an improvement for advantaging formation of a monolithic IC by reducing analog circuits in number.
A digital conversion method for an analog signal according to the present invention is a method for obtaining a digital angle output (&phgr;) from rotation detection signals [sin &thgr;·f(t) and cos &thgr;·f(t): where f(t) is an exciting component] obtained from a rotation detector, wherein the rotation detection signals [sin &thgr;·f(t) and cos &thgr;·(t)] are guided to a multiplier and mutually operated with sin &phgr; and cos &phgr; obtained from the digital angle output (&phgr;), in order to obtain [sin &thgr;·f(t)×cos &phgr;]−[cos &thgr;·f(t)·sin &phgr;]=sin(&thgr;−&phgr;)·f(t) as a first output signal, and the first output signal sin(&thgr;−&phgr;)·f(t) is converted into a digital signal by positive
egative sign determination performed by a comparator when the first output signal sin(&thgr;−&phgr;)·f(t) is synchronously detected to remove the exciting component f(t) and to obtain a second output signal sin(&thgr;−&phgr;) as an error deviation &egr;. The method is a method wherein the error deviation &egr; is input to a counter as a digital angular velocity signal &ohgr;(−&phgr;dot) through a compensator to be counted, and a digital angle output (&phgr;) is obtained from the counter. The method is a method wherein, in a multiplier, sin and cos 10-bit multiplying DIA converters are used, and a 12-bit counter is used as the counter. The method is a method wherein the digital angle output (&phgr;) is fed back and input to the sin and cos 10-bit multiplying D/A converters through a sin ROM and a cos ROM, and nonlinear characteristics are written in the sin ROM and the cos ROM. The method is a method wherein a DC bias current is applied to an output winding for outputting the rotation detection signals [sin &thgr;·f(t) and cos &thgr;·f(t)] depending on rotation of a rotor of the rotation detector, and a disconnection detection signal having a voltage higher than the maximum voltage of the rotation detection signals [sin &thgr;·f(t) and cos &thgr;·f(t)] from a differential amplifier when the output winding is disconnected. In addition, the method is a method wherein a phase difference between an exciting component included in the rotation detection signals sin &thgr;·f(t) and cos &thgr;·f(t) and an exciting signal of the rotation detector is detected, leading and trailing edges of the rotation detection signal component are detected to cause a reference signal guided to a synchronous detector to be synchronized with the exciting component included in the rotation detection signals.
REFERENCES:
patent: 5079549 (1992-01-01), Liessner
patent: 5189353 (1993-02-01), Ezuka
patent: 5796357 (1998-08-01), Kushihara
patent: 5949359 (1999-09-01), Vlahu
Sughrue Mion Zinn Macpeak & Seas, PLLC
Tamagawa Seiki Kabushiki Kaisha
Wamsley Patrick
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