Method of controlling switching of PNPN semiconductor switching

Details Method of controlling switching of PNPN semiconductor switching Method of controlling switching of PNPN semiconductor switching

1976-06-22

1978-03-21

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307252N, 307305, H03K 1772

Patent

active

040805387

ABSTRACT:
After a principal current through an SCR has been decreased to zero by inverting the polarity of the voltage between the main terminals of the SCR(anode voltage,) its gate is reversely biased with a gate bias pulse including a time point where the anode voltage passes through a zero point toward the positive direction. Also, the gate is reversely biased with a gate bias signal in the form of a direct current less in amplitude than the bias pulse. The bias signal may be in the form of a pulse consecutive to the bias pulse and terminating not earlier than the termination of the OFF-state voltage.

REFERENCES:
patent: 3404293 (1968-10-01), Harris et al.
patent: 3488522 (1970-01-01), Cameron et al.
patent: 3622806 (1971-11-01), Williams

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