Coded data generation or conversion – Digital code to digital code converters – To or from number of pulses
Reexamination Certificate
2005-09-06
2005-09-06
Jeanglaude, Jean Bruner (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from number of pulses
C341S107000, C382S239000, C382S246000, C706S015000
Reexamination Certificate
active
06940429
ABSTRACT:
This invention increases the available instruction level parallelism (IPC) of CABAC encoding by decoupling the re-normalization loop and the bit-insertion task required to create the encoded bit-stream. This makes all software implementations of CABAC based encoding significantly faster on digital signal processors that can exploit instruction level parallelism such as very long instruction word (VLIW) digital signal processors. In a joint hardware/software implementation, this invention employs existing Huffman variable length encoding hardware with minimum modifications. The de-coupling of these two tasks of this invention exposes previously hidden underlying instruction level parallelism and task level parallelism.
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Brady III W. James
Jeanglaude Jean Bruner
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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