Method of contacting a chip

Details Method of contacting a chip Method of contacting a chip

1999-09-01

2001-09-04

Tolin, Gerald (Department: 2835)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C029S840000, C228S180220, C257S737000, C257S781000

Reexamination Certificate

active

06285562

ABSTRACT:

FIELD OF THE INVENTION
The present invention refers to a method for bonding chips on a flexible circuit carrier.
BACKGROUND OF THE INVENTION
Flexible circuit carriers consist of a flexible, thin polymer foil with a structured metallization layer as conducting paths. The flexible circuit carriers can be either single-layer or multilayer. Multilayer flexible circuit carriers are provided with contact channels, so-called plated-through holes, which are arranged at right angles to the layers and which connect the individual levels electrically.
Flexible circuit carriers are employed where parts of a system which are movably connected to one another are electrically connected. Examples of this are notebooks or laptops with a hinged screen and collapsible mobile telephones. In the automobile industry, flexible circuit carriers are needed e.g. so that electrical connections entering the engine area can be decoupled from mechanical vibrations, Where space is severely restricted in a geometrically complex housing, circuits implemented on flexible circuit carriers can be matched to the shape of the housing in a space-saving way (3-dimensional design), something that is not possible with rigid printed circuit boards (2-dimensional design).
A bonding technique of the first level (first-level bonding technique) between one or more chips and a flexible circuit carrier is the so-called tape automated bonding (TAB) To realize the advantage of a high number of connections per chip surface, so-called flip-chip technologies have also been used on flexible circuit carriers very recently. Patent Abstracts of Japan, Vol. 9, No. 284 (E-357), Nov. 2, 1985 discloses a method for connecting a flexible substrate to bonding areas of a semiconductor element. In this method the conducting paths on the flexible circuit are each connected with bonding areas of the semiconductor element using a metal ball and compression bonding.
From DE 4131413 A1 a bonding method for semiconductor chips is known wherein a first gold ball, a second gold ball and a lead ball are used per bonding site to apply a chip to a substrate by means of a flip-chip bonding method.
SUMMARY OF THE INVENTION
It is the object of the present invention to provide a chip bonding method which enables chips to be bonded on a flexible circuit carrier while requiring a minimal amount of space.
The present invention provides a method for mounting a chip on a flexible circuit carrier, comprising the method steps of:
a) applying first bonding bumps to bonding electrodes of the chip;
b) arranging a first flexible circuit carrier, provided with at least one bonding area, on the chip, the flexible circuit carrier having cavities which are aligned with the bonding bumps and which extend through the first flexible circuit carrier and at least one bonding area on the first flexible circuit carrier; and
c) after step b), applying second bonding bumps to the first bonding bumps such that at least one bonding area on the first flexible circuit carrier is in contact with at least one of the first or second bonding bumps.
It is another object of the present invention to provide an electronic circuit for which chips are bonded on a flexible circuit carrier with a minimum of space being needed.
The present invention provides an electronic circuit comprising
at least one chip with bonding electrodes on which first bonding bumps are arranged,
a first flexible circuit carrier, which comprises a carrier foil and a bonding area arranged on the same, with cavities which are aligned with the first bonding bumps which are arranged on the at least one chip; and
second bonding bumps, which are arranged on the first bonding bumps in such a way that the bonding area of the first flexible circuit carrier is in contact with the first and/or second bonding bumps.
An advantage of the present invention is that a space-saving bonding of a chip while using traditional wire-bond devices becomes possible.
According to a further advantage, the present invention makes short signal paths possible for chips with peripheral electrode arrangement (i.e. for chips for which the electrodes are arranged at the edge of the chip) and for chips with an electrode configuration in a planar arrangement (the so-called area configuration) without using a flip-chip bonder.
In addition, the present invention makes possible multilayer bondings without using a multilayer substrate.
Yet another advantage of the present invention is that the bonding of the chips is performed at relatively low temperatures (max. 200° C., such temperatures being common for wire bonding and ball bumping), no forces here being exerted on the carrier foil by the bonding process.


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Patent Abstracts of Japan, vol. 9, No. 284 (E-357), Nov. 12, 1985, and JP A, 60 126856 Jul. 6, 1985.
International Journal of Microcircuits and Electronic Packaging, Flip-Chip Attachment of Fine-Pitch GaAs Devices Using Ball-Bumping Technology, J. Eldring et at., 17 (1004) Second Quarter, No. 2, pp 118-126.
43rd ECTC/IEEE, Jun. 1-4, 1993, Buena Vista Palace, Orlando, Florida, USA, D. Chu et al, “A Maskless Flip-Chip Solder Bumping Technique” pp 610-614.
IBM Technical Disclosure Bulletin, vol. 37, No. 7, Jul. 1994, pp 207-208, “Flip-chip Assembly for Improved Thermal Performance”.
Patent Abstracts of Japan, E-1451, Oct. 21, 1993, vol. 17/No. 579, Integrated Circuit Element Packaging Device, JP 5-175279 (A).
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