Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2002-09-04
2004-07-27
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S706000, C438S714000, C438S905000, C134S001100, C156S345420
Reexamination Certificate
active
06767836
ABSTRACT:
FIELD OF THE INVENTION
This disclosure relates generally to cleaning a chemical vapor deposition (CPU) and more particularly, to cleaning carbon-containing deposits from a CVD with active oxygen species.
BACKGROUND OF THE INVENTION
In a conventional large scale integration (LSI) device—for example, a CPU, memory, or system LSI—the insulator between the metal circuit lines is silicon dioxide (SiH
4
based SiO
2
or TEOS based SiO
2
) or fluorinated silica glass. Reducing the resistance of the metal lines or the capacitance of the insulator between metal lines allows increased speed in a device. The resistance of the metal lines may be reduced by using copper as the conductor instead of an aluminum alloy. The capacitance of the insulator may be reduced by using a low-k film rather than SiO
2
or related materials. The dielectric constant of SiO
2
-based films is typically from about 3.8 to about 4.4. The dielectric constant of a low-k film is typically from about 2.0 to about 3.0. Through these methods, RC delay may be reduced, thereby allowing the fabrication of faster devices.
Several low-k materials have been developed. One type of low-k material is carbon-doped SiO
2
. Such a film typically contains Si, O, C, and H. See, for example, U.S. Pat. Nos. 6,352,945 and 6,383,955.
When pure or fluorine-doped SiO
2
is deposited on a semiconductor wafer in a chemical vapor deposition (CVD) reactor, some SiO
2
is also deposited on interior surfaces of the CVD reactor. This contaminating material is typically removed by in-situ plasma discharge. A fluorine-containing gas is used as a cleaning gas, which is activated by a local plasma discharge within the CVD chamber. Examples of such cleaning gases include C
2
F
6
, CF
4
, and C
3
F
8
, mixed with O
2
.
The fluorocarbons used in the cleaning process are “greenhouse gases,” believe to contribute to the greenhouse effect, however. To reduce the use of greenhouse gases, NF
3
been used as the cleaning gas in a remotely generated plasma. An argon gas carrier stabilizers the plasma discharge in a plasma chamber separate from the CVD reactor. This process is disclosed in U.S. Pat. No. 6,187,691 and U.S. application Ser. No. 2002/0011210A1.
Similarly, after the depositing a low-k film, a CVD reactor is typically contaminated with carbon, silicon, oxygen, and hydrogen containing residues. Fluorine-containing species derived from NF
3
are introduced from a separate plasma chamber through a conduit into the CVD reactor, thus removing these contaminants. Although the activated species (e.g., fluorine radicals) react with the contaminants, carbon-containing contaminants react to form fluorocarbon compounds that remain in the CVD chamber. During low-k dielectric film deposition, these fluorocarbon compounds can volatilize and influence the film formation on the wafer.
This fluorocarbon contamination results in an undesirable process gas mixture, adversely influencing the deposition of the low-k layer by, for example, reducing deposition rates, producing non-uniform film thickness on individual wafers, or producing non-uniform film thickness within a lot of sequentially processed wafers. The film non-uniformity on a single wafer is expressed as a percentage, calculated as the difference between the maximum and minimum film thickness on the wafer, divided by the average film thickness of the wafer, divided by 2, and multiplied by 100. The film non-uniformity within a lot or batch of wafers is expressed as a percentage, calculated as the difference between the maximum and minimum film thickness in the lot, divided by the average film thickness of the lot, divided by 2, and multiplied by 100. Typically, the film non-uniformity of the first wafer is worse compared with the second wafer. For example, in one 25-wafer processing cycle, the deposition rate for the first wafer varied ±1.4% compared to the rate for subsequent wafers, and a single wafer film non-uniformity for the first wafer was ±(2.7%-3.5%).
These non-uniformities are undesirable because they affect the device k-value. Device k is the measured capacitance of an isolated dielectric between two parallel metal lines. The capacitance between two parallel conductors is the total cross sectional area between the conductors multiplied by the dielectric constant of the insulating film divided by the distance between the two conductors. For example, the capacitance between a pair of metal lines isolated by a single dielectric film is C=k
eff
&egr;(A/d), where &egr;=8.85×10
−12
C
2
/Nm
2
, C is the measured capacitance, A is the total cross sectional area between the two lines (dielectric film thickness t times effective line length L
eff
), d is the distance between the metal circuit lines (the isolation width), and k
eff
is the effective dielectric constant of the film. Hence, effective k can be calculated as k
eff
=(C/&egr;) (d/A). Because capacitance C is dependent on the dielectric film thickness t, k
eff
is also dependent on film thickness.
In both the fluorocarbon and NF
3
plasma cleaning processes, the CVD reactor is cleaned by active fluorine species in an inert gas, for example argon. Both methods produce non-volatile fluorocarbon by-products, however, that may cause undesirable variations in the deposition process.
SUMMARY OF THE INVENTION
The present invention relates to a method of cleaning contaminants from the reaction chamber of a CVD reactor with active oxygen species produced, for example, from an oxygen plasma. The method is particularly suited to cleaning a PECVD (plasma-enhanced CVD) reactor, especially a PECVD reactor used to deposit dielectric films, including low-k films. The method disclosed herein is more particularly suited to cleaning a PECVD reactor used to deposit carbon-containing films, including carbon-doped silicon oxide, which contain Si, C, O, and I—I; silicon carbide films, which contain Si, C, and H; and SiCN films, which contain Si, C, N, and H. A PECVD reactor is typically a single or small batch substrate-processing apparatus used to deposit a film onto a wafer.
The oxygen plasma cleaning process is preferably performed one hour or less before the first wafer of a lot is loaded into the CVD reactor. Twenty-five wafers are a typical lot. This application describes three embodiments that provide active oxygen species to the CVD reaction chamber for cleaning purposes:
(1) An in-situ oxygen plasma cleaning process, wherein an oxygen plasma is generated within the CVD reaction chamber;
(2) A downstream oxygen plasma cleaning process, wherein an oxygen plasma is generated in a plasma chamber separate from the CVD reaction chamber; and
(3) A downstream oxygen-fluorine plasma cleaning process, wherein a plasma that contains both active oxygen and fluorine species is generated in a plasma chamber separate from the CVD reaction chamber.
The time required for the cleaning cycle of the CVD reactor using the process disclosed herein depends on the conditions used in the deposition process. Typically, the material deposited, the longer the cleaning cycle. The length of the cleaning cycle may be readily ascertained by one skilled in the art without undue experimentation. After performing an oxygen plasma CVD cleaning step and before loading the first wafer, the reactor may be allowed to idle, for example under maximum vacuum or in stand-by mode, as detail below until the temperature of the wafer support structure has stabilized.
As discussed above, the thickness non-uniformity of the first wafer deposited by a CVD reactor is typically worse compared with the second wafer. For example, in one 25-wafer processing cycle, the deposition rate for the first wafer varied ±1.4% compared to rate for subsequent wafers, and the thickness non-uniformity was ±(2.7%-3.5%). After applying the oxygen plasma cleaning process disclosed herein, however, the deposition rate of the first wafer was less than 1% slower and the thickness non-uniformity was below ±2.5%.
REFERENCES:
patent: 5252178 (1993-10-01), Moslehi
paten
Kagami Kenichi
San Nelson Loke Chou
Satoh Kiyoshi
ASM Japan K.K.
Duong Khanh
Knobbe Martens Olson & Bear LLP
Zarabian Amir
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