Method of capless annealing for group III-V compound semiconduct

Details Method of capless annealing for group III-V compound semiconduct Method of capless annealing for group III-V compound semiconduct

1985-09-03

1987-06-30

Roy, Upendra

Metal treatment

Compositions

Heat treating

29576B, 29576T, 148175, 148187, 148DIG84, 357 61, H01L 21263, H01L 2948

Patent

active

046768408

ABSTRACT:
A method of capless annealing for an ion implanted substrate of a group III-V compound semiconductor, wherein said ion implanted substrate is placed in an inert ambient with a temperature ranging between 500 to 1000 degrees centigrade and a pressure ranging from 30 to 90 atmospheres, thereby increasing the deep energy level EL 2 concentration in the surface portion of a semiconductor substrate. The resistivity of the compound semiconductor substrate is increased in accordance with the deep energy level EL 2 concentration. This method is conducive to maintenance of the isolation between adjacent semiconductor elements fabricated on the group III-V compound semiconductor substrate.

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