Method of bonding a silicon package for a power semiconductor de

Glass manufacturing – Processes – Fusion bonding of glass to a formed part

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65 58, 437213, C03B 2320

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active

050340441

ABSTRACT:
A method is provided for making a hermetically sealed package for a power semiconductor wafer with silicon materials selected to have coefficients of thermal expansion closely matching that of the power semiconductor water. A semiconductor wafer such as a power diode has a layer of silicon material having first and second device regions on respective sides thereof. An electrically conductive cap and base of silicon are disposed in electrical contact with the first and second regions of the semiconductor device, respectively. An electrically insulative sidewall of silicon glass material surrounds the semiconductor wafer, is spaced from the edge, and is bonded to the cap and base for hermetically sealing the package. The glass sidewall is directly bonded to the base by bringing the base and sidewall into intimate contact under a slight pressure and heating to a temperature at which the glass wets the silicon base, holding this temperature for a time and then cooling the composite to complete the bond.

REFERENCES:
patent: 3354258 (1987-11-01), Saia et al.
patent: 3475663 (1969-10-01), Boyer
patent: 3501833 (1970-03-01), Spiegler
patent: 3566205 (1971-02-01), Walker et al.
patent: 3591837 (1971-07-01), Boyer
patent: 3643136 (1972-02-01), Tuft
patent: 3742599 (1972-07-01), Desmond et al.
patent: 3768991 (1973-10-01), Rogers
patent: 3885860 (1975-05-01), Sorkin
patent: 3909332 (1975-09-01), Yerman
patent: 4235645 (1980-11-01), Johnson
patent: 4285714 (1981-08-01), Kirkpatrick
patent: 4329701 (1982-05-01), Brenneman
patent: 4355463 (1982-10-01), Burns
patent: 4400870 (1983-08-01), Islam
patent: 4430664 (1984-02-01), Matsunaga et al.
patent: 4530029 (1985-07-01), Beristain
patent: 4542259 (1985-09-01), Butt
patent: 4641176 (1987-02-01), Keryhuel et al.
patent: 4685200 (1987-08-01), Bokil
patent: 4745455 (1988-05-01), Glascock, II et al.
patent: 4769345 (1988-09-01), Butt et al.
patent: 4839716 (1989-06-01), Butt
patent: 4905075 (1990-02-01), Temple et al.
Robertson, F. A., "Packaging Techniques for Modern Microelectronics Equipment", Electronics and Power, Oct. 1971, pp. 75-86.
Scrupski, S. E., "Plastic-Ceramic Duel Stirs Up New Design Concepts for LSI Packages", Electronics, vol. 44, No. 8, 4/12/81, pp. 406-409.

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