Method of ball grid array (BGA) alignment, method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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C257S698000

Reexamination Certificate

active

07005754

ABSTRACT:
A method and apparatus for aligning a semiconductor device with a corresponding landing site on a carrier substrate. At least two apertures are formed in a semiconductor device, the apertures passing from a first major surface to a second, opposing major surface of the semiconductor device. Corresponding alignment features are provided on the carrier substrate at the landing site to which the semiconductor device is to be mounted. The alignment features are aligned with the corresponding apertures to effect alignment of the semiconductor device. The alignment features may include apertures corresponding in size, shape and arrangement to the semiconductor device apertures. Alignment pins may be placed through the at least two apertures to assist with alignment.

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