Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2008-06-17
2011-10-04
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S122000, C716S126000
Reexamination Certificate
active
08032852
ABSTRACT:
A method is provided to incorporate information currently known about an integrated circuit's design, including peripheral components that share the same printed circuit board (PCB) with the integrated circuit, to automate a clock signal instantiation and routing solution to realize a comprehensive design. The information derived from a hardware design synthesis tool includes the existence of PCB resources, such as fixed-frequency oscillators, that may co-exist with a particular integrated circuit, such as a programmable logic device (PLD). Other derived information includes details concerning clock modules and cores that may exist within the PLD in accordance with the PLD's design specification. Once the information that describes the PLD and its environment is known, the information is utilized to automatically instantiate resource interconnect cores and automatically generate connections between the fixed-frequency oscillators, resource interconnect cores, and PLD implemented cores that are contained within the design.
REFERENCES:
patent: 5717942 (1998-02-01), Haupt et al.
patent: 6028446 (2000-02-01), Agrawal et al.
patent: 6195774 (2001-02-01), Jacobson
patent: 6647508 (2003-11-01), Zalewski et al.
patent: 6766389 (2004-07-01), Hayter et al.
patent: 6857110 (2005-02-01), Rupp et al.
patent: 7028270 (2006-04-01), Lam et al.
patent: 7235999 (2007-06-01), Goetting et al.
patent: 7337422 (2008-02-01), Becker et al.
patent: 7389489 (2008-06-01), Chesal et al.
patent: 7552415 (2009-06-01), Sanchez et al.
patent: 7594211 (2009-09-01), Tian et al.
patent: 2005/0094446 (2005-05-01), Terazawa et al.
patent: 2005/0169318 (2005-08-01), Minemura et al.
patent: 2008/0244491 (2008-10-01), Ganesan et al.
U.S. Appl. No. 12/186,414, filed Aug. 5, 2008, Martin et al.
U.S. Appl. No. 12/329,881, filed Dec. 8, 2008, Sinclair.
Edwards Gareth D.
Lindop Nathan A.
Sinclair Martin
Maunu LeRoy D.
Siek Vuthe
Wallace Michael T.
Xilinx , Inc.
LandOfFree
Method of automating clock signal provisioning within an... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of automating clock signal provisioning within an..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of automating clock signal provisioning within an... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4298904