Image analysis – Applications – Manufacturing or product inspection
Reexamination Certificate
1998-09-25
2003-03-11
Mehta, Bhavesh (Department: 2625)
Image analysis
Applications
Manufacturing or product inspection
C382S201000, C356S237100, C356S239300
Reexamination Certificate
active
06532300
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method of automatically analyzing patterns and, more particularly, to automatic pattern analysis performed in a system comprising a wafer process-evaluating apparatus to which an x-ray analysis function is added.
BACKGROUND OF THE INVENTION
When a pattern on a semiconductor wafer is analyzed with a wafer process-evaluating apparatus, an analysis point is displayed on a monitor on the evaluating apparatus and manually brought into the center. Then, the accelerating voltage, the probe current, and the magnification are manually established. Also, the beam is manually focused. Preparations for an x-ray analysis are made manually. Then, the x-ray analysis is made to identify the object (e.g., a pattern on the wafer) under analysis. Where the positions of repeating patterns on chips of a wafer are analyzed, the analysis is performed again manually.
With the above-described prior art method, an object to be analyzed (e.g., a pattern) is displayed and then the process sequence is advanced to the next process step manually. This necessity has made it impossible to perform automatic analysis.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method capable of automating pattern analysis.
This method is initiated by selecting one typical pattern from a multiplicity of repeating patterns. On the selected typical pattern, analysis points, analysis methods and analysis conditions are determined. Points on other patterns having the same positional relation as the analysis points determined for the typical pattern are automatically analyzed under the analysis conditions by the analysis methods determined for the typical pattern.
In the configuration of the present invention, if there exists repeating patterns, such as chip patterns, the repeating patterns can be automatically analyzed by establishing analysis positions on the typical pattern. Active use of a position recognition function attached to this kind of apparatus is made in establishing the coordinates of the analysis points.
The aforementioned analysis methods and analysis conditions are characterized in that the process of the operator's trial and error is automatically recorded. Based on the recorded process, amendments and confirmations are made. Then, established analysis methods and analysis conditions are recorded.
In one feature of the present invention, optimum analysis methods and conditions are selected from the process of the operator's trial and error. Then, automated analysis can be performed.
Other objects and features of the invention will appear in the course of the description thereof, which follows.
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patent: 5528360 (1996-06-01), Kohno
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“In-Line Inspection Scanning Electron Microscope JWS-7515 for Deep submicron Semiconductor Manufacturing”, Kazuhiro Honda,JEOL News,vol. 32E, No. 1 (1996), pp. 52-54.
“EDS Analysis With Wafer Inspection SEM”, Katsuhiro Ono et al.,SEMICON Korea 95, Jan. 20, 1995, pp. 81-88.
Chawan Sheela
Jeol Ltd.
Mehta Bhavesh
Webb Ziesenheim & Logsdon Orkin & Hanson, P.C.
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