Method of assigning slots in a UCOL-type star network and electr

Details Method of assigning slots in a UCOL-type star network and electr Method of assigning slots in a UCOL-type star network and electr

1991-09-24

1993-05-04

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 943, 370 951, H04J 316

Patent

active

052088081

ABSTRACT:
A timeslot assigning circuit for use in a UCOL-type star network includes a first circuit block having a RAM-type memory for storing incoming requests for assignment. The first circuit block is connected to a second circuit block, which includes a FIFO memory in which requests for assignment are cyclically loaded. A decrementing circuit is connected downstream from the FIFO memory, and a filter is connected at the input of the FIFO memory and downstream on the decrementing circuit, so that requests for assignment which are null or are already satisfied are eliminated. A control circuit permits the cyclic scanning of requests, while a second FIFO memory is provided at the output of the first FIFO memory to contain the requests relative to single slots assigned during an operating cycle.

REFERENCES:
patent: 4763320 (1988-08-01), Rudolph et al.
patent: 5079763 (1992-01-01), Chao et al.
Proceedings of the Fourth Tirrenia International Workshop on Digital Communications, Sep. 1989, Amsterdam NL, pp. 249-263; A. Fioretti et al.: "Research of Coherent Optical Lans".

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