Method of assembling stacks of integrated circuit dies

Details Method of assembling stacks of integrated circuit dies Method of assembling stacks of integrated circuit dies

1990-06-18

1991-01-15

Echols, P. W.

Metal working

Method of mechanical manufacture

Electrical device making

29854, 29885, 29412, 29413, 29414, 437226, H05K 336

Patent

active

049843583

ABSTRACT:
Integrated circuit dies, while still in wafer form, are prepared for stacking without requiring packaging. Holes are made through a wafer having a plurality of integrated circuit dies and are placed between the dies and adjacent the die pads. A layer of insulating material is placed on the wafer and in the outer periphery of the holes. An electrically conductive connection is made between the top of each pad and the inside of the insulating material in an adjacent hole. The insulating layer and the electrically conductive layer can be further extended to the backside of the dies if desired. The dies are separated from each other and can be assembled in a stack and/or surface mounted to a substrate.

REFERENCES:
patent: 3280019 (1966-10-01), Harding et al.
patent: 3588852 (1971-06-01), McCormack et al.
patent: 3835531 (1974-09-01), Luttmer
patent: 4486738 (1984-12-01), Sadlo et al.
patent: 4542397 (1985-09-01), Biegelsen et al.
patent: 4640721 (1987-02-01), Uehara et al.
patent: 4897918 (1990-02-01), Osaka et al.

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