Metal working – Method of mechanical manufacture – Electrical device making
Patent
1996-06-14
1998-03-24
Echols, P. W.
Metal working
Method of mechanical manufacture
Electrical device making
29840, 29841, 29846, 29852, 257693, H05K 330, H05K 310, H01K 310
Patent
active
057298947
ABSTRACT:
A ball bump grid array package includes dies on one surface of a printed wiring board (PWB) and an array of ball bumps on the other surface of the PWB. The die is interconnected with the ball bumps by bond wires, traces on the one surface of the PWB, vias through the PWB and traces on the other surface of the PWB. Various die encapsulation schemes are discussed. The PWB is formed of FR4, BT, teflon or polyimide, or ceramic materials. The die may be connected to the traces on the one surface of the PWB with solder balls, rather than with bond wires. Two or more dies may be disposed on the one surface of the PWB, within the plastic molded body. The ball bumps on the other surface of the PWB may be arranged in a multiple grid pitch array--ball bumps within a central area being on a first pitch, and ball bumps without the central area being on a second pitch which is a multiple of the first pitch.
REFERENCES:
patent: 4539622 (1985-09-01), Akasaki
patent: 4628406 (1986-12-01), Smith et al.
patent: 4975765 (1990-12-01), Ackermann et al.
patent: 5216278 (1993-06-01), Lin et al.
patent: 5334857 (1994-08-01), Mennitt et al.
Fulcher Edwin
Rostoker Michael D.
Schneider Mark R.
Echols P. W.
LSI Logic Corporation
LandOfFree
Method of assembling ball bump grid array semiconductor packages does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of assembling ball bump grid array semiconductor packages, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of assembling ball bump grid array semiconductor packages will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2280520