Method of arranging alignment marks

Details Method of arranging alignment marks Method of arranging alignment marks

1997-11-25

1999-12-21

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

257620, 438401, 438462, 438975, H01L 23544

Patent

active

060052945

ABSTRACT:
A shot region includes a device region for forming a semiconductor device therein and a dicing region used for dicing. A portion of the peripheral edge portion of the shot region is defined by a portion of the peripheral edge portion of the device region. An alignment mark is arranged within the device region, and additional alignment marks are arranged within the dicing region. Thus, the number of the devices manufactured per wafer can be increased without degrading precision of alignment.

REFERENCES:
patent: 4981529 (1991-01-01), Tsujita
patent: 5684333 (1997-11-01), Moriyama
patent: 5777392 (1998-07-01), Fujii

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