Method of and system for laying out bus cells on an integrated c

Boots – shoes – and leggings

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364488, 364489, 364490, G06F 1750

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active

054404975

ABSTRACT:
In an automatic layout system each signal path is represented in a binary form by its connection points with top, right, bottom and left bus cells on an integrated circuit. A bit-by-bit comparator uses preset table data in a read-only memory to investigate each possible combination of the signal paths in order to select the signal paths that can share a common bus channel. A coordinate comparator uses another preset table data to check whether the selected signal path combination satisfy further conditions of channel sharing. If so, the signal path combination is treated as a single new signal path, which is again investigated to find further possible channel sharing. In a final list of signal paths supplied to a bus cell layout circuit, all of the signal paths that can share a common bus channel are represented as one signal path.

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