Method of and means for quantizing analog-voltage samples

Communications: electrical – Audible indication – Percussion-type sound producer

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340347AD, 179 15AP, H03K 1320

Patent

active

040018121

ABSTRACT:
Analog-voltage samples to be transmitted in digital form over a communication channel, ranging between a lower and an upper limit V.sub.min and V.sub.max, are quantized in 2.sup.n levels with 2.sup.n/2 major quantum steps each subdivided into 2.sup.n/3 minor quantum steps represented by n-bit words, a group of n/2 bits of each word representing the major quantum steps and another group of n/2 bits representing the minor quantum steps. A converter at the transmitting end includes a first and a second constant-current generator, of high and low rate respectively, which are sequentially activated to discharge and to charge an input capacitor temporarily storing an analog-voltage sample to be digitized. The first generator rapidly discharges the input capacitor while an associated first pulse counter receives a series of forward-counting clock pulses, each pulse corresponding to a major quantum step, until the absolute value of the capacitor voltage drops below that of a predetermined reference voltage V.sub.r = V.sub.min, the cutoff of the count being determined by the trailing edge of a clock pulse. The second generator then slowly recharges the capacitor to substantially the reference voltage while an associated second pulse counter receives forward-counting clock pulses to count the minor quantum steps. The stage outputs of the first and second pulse counters deliver the bits of the word to be transmitted over the channel to a reconverter at the receiving end including third and fourth constant-current generators, respectively similar to the first and second generators, which are sequentially activated under the control of a third and a fourth pulse counter respectively preloaded with the two groups of n/2 bits of the incoming code word. The third counter receives backward-counting clock pulses until it reaches an all-zero position, the associated third generator rapidly charging an output capacitor during this period; then the fourth counter receives backward-counting clock pulses until it reaches the all-zero position while the associated fourth generator slowly discharges the output capacitor. With the third and fourth counters both reset to zero, the output capacitor has a charge equal (or proportional) to that of the input capacitor which was translated into the received code word. The output of the highest-ranking stage of the first counter may be integrated to provide a corrective potential compensating for relative drifts between the mean signal voltage and the reference voltage.

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patent: 3768009 (1973-10-01), Dorey
patent: 3778812 (1972-12-01), Bayati
patent: 3842416 (1974-10-01), Eto

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