Method of and circuit for synchronizing data

Pulse or digital communications – Spread spectrum – Direct sequence

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370101, 370102, 3701053, 375118, H04L 700

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active

051114852

ABSTRACT:
Asynchronous DS-1 data is byte synchronized and converted to the SONET VT1.5 format by storing the DS-1 data in a store from which it is read in dependence upon a gapped clock signal which is produced by gapping a first gapped clock signal with a ratio of 208/193, which is the ratio of VT SPE bits per frame to DS-1 bits per frame. The first gapped clock signal is produced by gapping a VT1.5 synchronous clock signal. A frequency difference between the first gapped clock signal and the asynchronous data rate, multiplied in a frequency multiplier by the ratio of 208/193, is monitored by comparing the counts of modulo-208 counters, and, in dependence upon the monitored frequency difference, the gapping of the synchronous clock signal is controlled to achieve positive or negative stuffing and hence to compensate for the frequency difference.

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W. Bartel et al., "Multiplexing of Plesiochronous Signals In A Digital Optical, Service-Integrated Subscriber Line System", Jun. 1985, IEEE International Conference on Communications 1985, vol. 1, pp. 165-170.
T. E. Moore et al., "Jitter Analysis for DS-3 To SONET Interface Circuit With Reduced Complexity", Jun. 1989, IEEE Pacific Rim Conference On Communications, Computers And Signal Processing, pp. 435-438.
Doowhan Choi, "Waiting Time Jitter Reduction", Nov. 1989, IEEE Transactions On Communications, vol. 37, No. 11, pp. 1231-1236.

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