Boots – shoes – and leggings
Patent
1991-03-06
1996-07-09
Swann, Tod R.
Boots, shoes, and leggings
395478, 395485, 395487, 36424291, 36424612, 3645443, 364DIG1, G06F 1300
Patent
active
055353665
ABSTRACT:
A buffer or other communications resource in, e.g., an ATM switch element receives random data which is then used by different data sinks. After the data has been outputted to the data sinks, the communications resource (e.g., the memory locations of the buffer) are released, i.e., labeled as free again. However, a resource which is not marked as free as a result of an error (whether erroneously the data is not retrieved or whether the release procedure is erroneous) remains blocked. To avoid permanent blockage of those memory locations whose contents have been in the buffer so long that they definitely (or at least very likely) should have been called for, information on the time of entry is stored together with the data. All memory locations are checked at regular intervals for the age of their contents. Upon attainment of a predetermined age, the location is labeled as free.
REFERENCES:
patent: 3647979 (1972-03-01), Rubin
patent: 4530054 (1985-07-01), Hamstra et al.
patent: 4630259 (1986-12-01), Larson et al.
patent: 4947388 (1990-08-01), Kuwahara et al.
patent: 5099475 (1992-03-01), Kozaki et al.
patent: 5130984 (1992-07-01), Cisneros
patent: 5168492 (1992-12-01), Beshai et al.
patent: 5202885 (1993-04-01), Schrodi et al.
patent: 5214639 (1993-05-01), Herion
patent: 5216669 (1993-06-01), Hofstetter et al.
J. M. Cotton, et al., "ITT 1240 Digital Exchange Digital Switchin Network", Electrical Communication, vol. 56, No. 2/3, 1981.
H. M. Deitel; "An Introduction to Operating Systems" Addison-Wesley Publ. Co.; pp. 216-220; 1984.
D. Japel et al: "Communications for the Information Age"; IEEE Global Telecom. Conf. & Exhib.; vol. 3; pp. 54.2.1-54.2.7; 28 Nov.-1 Dec. '88.
Hj. Keller et al; "A Novel Memory Controller for an ATM Switch" 1990 Intern'l Zurich Sem. on Digital Commun.; pp. 103-114; 5-8 Mar. '90.
S-L Min et al; "A Timestamp-based Cache Coherence Scheme" Proc. 1989 Intern'l Conf. on Parallel Process'g; vol. 1, pp. I23-I32; 8 Aug. '89.
Banniza Thomas
Cesar Bozo
Menk Klaus-Dieter
Pfeiffer Bodo
Wahl Stefan
Alcatel N. V.
Asta Frank J.
Swann Tod R.
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