Method of and circuit arrangement for automatic signal-level con

Details Method of and circuit arrangement for automatic signal-level con Method of and circuit arrangement for automatic signal-level con

1980-09-17

1983-01-25

Wise, Edward J.

Boots, shoes, and leggings

364514, 330 51, 358174, H04L 1524

Patent

active

043707254

ABSTRACT:
A binary input signal S multiplied by a level-controlling modifier X.sub.n-1 is periodically sampled to determine its amplitude whose value is then differentially combined with a fixed reference value R to produce an error signal. The latter is multiplied by the same modifier X.sub.n-1 and by a fractional coefficient k to yield a corrective value which is then algebraically combined with modifier X.sub.n-1 to produce an updated modifier X.sub.n for the next sampling cycle. To avoid instability, the modified input signal may be subjected to a limitation of its dynamic range before or after sampling. A load to be driven by the input signals may receive the modified signal itself or the modifier used to control its level.

REFERENCES:
patent: 3624562 (1971-11-01), Fujimura
patent: 3715666 (1973-02-01), Mueller
patent: 3745463 (1973-07-01), Klein
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patent: 4191995 (1980-03-01), Farrow
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Article by Jacob Millman and Christos C. Halkias, titled "Integrated Electronics: Analog and Digital Circuits and Systems", McGraw-Hill Kogakusha, Ltd., Tokyo, copyright 1972, pp. 97, 98.
Article by Dennis R. Morgan, titled "On Discrete-Time AGC Amplifiers", IEEE Transactions on Circuits and Systems, vol. CAS-22, No. 2, Feb. 1972, pp. 135-145.
Article by Winfried Niebler and Wolfgang Hess, titled "Multiplizierer steuert Verstarkung", Radio Mentor Electronic, Aug. 1972, pp. 370-373.

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