Method of and arrangement for detecting faults in a memory devic

Details Method of and arrangement for detecting faults in a memory devic Method of and arrangement for detecting faults in a memory devic

1976-08-30

1978-02-21

Atkinson, Charles E.

Registers

Systems controlled by data bearing records

Time analysis

G11C 2900

Patent

active

040754669

ABSTRACT:
A method and an arrangement is provided for detecting a faulty memory element among a plurality of memory elements. Two element categories are introduced. If a memory element belongs to the first category normal writing and reading processes are carried out. If a memory element belongs to the second category the writing processes as well as the reading processes are combined with an inversion a (binary complementing) of the actual transferred binary information. The category of an element is shifted at times, for example, before each writing process.

REFERENCES:
patent: 3336579 (1967-08-01), Heymann
patent: 3576982 (1971-05-01), Duke
patent: 3727039 (1973-04-01), Baker et al.
patent: 3768071 (1973-10-01), Knauft et al.
patent: 3898449 (1975-08-01), Sanabria
patent: 3972033 (1976-07-01), Cislaghi et al.

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