Optical communications – Optical transceiver – Single device as transmitter and receiver
Reexamination Certificate
2000-02-15
2004-03-09
Pascal, Leslie (Department: 2633)
Optical communications
Optical transceiver
Single device as transmitter and receiver
C398S130000, C398S136000, C398S147000, C455S423000, C455S425000
Reexamination Certificate
active
06704516
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to infrared data communication (IRDC), and more particularly to, a method and apparatus for optimizing a minimum turn around time (MTAT) between the reception and the transmission, as well as between the transmission and the reception, of IRDC data by an infrared device.
BACKGROUND OF THE INVENTION
Infrared data communication (IRDC) between two infrared (IR) devices is constrained by the half duplex nature of IRDC and certain industry standards, both of which affect the quality and speed of the IRDC. The half duplex nature of IRDC limits the IRDC because only one infrared device can transmit infrared data at a time to the other infrared device, rather than having a simultaneous exchange of such infrared data. Accordingly, speed (throughput) is sacrificed. Moreover, this limitation is further complicated by a Minimum Turn Around Time (MTAT) set forth by industry protocol. Both of these limitations may effect the quality (lost data) or speed (throughput) of the data transmission and their effect must therefore be minimized. Both of these limitations are explained by reference to prior art
FIGS. 1
,
2
, and
3
.
FIG. 1
is a prior art block diagram view of an IRDC between two infrared devices. In
FIG. 1
, a first IR device
5
is in communication with a second IR device
10
using IRDC as the communication means. The first IR device
5
transmits data through frame(s)
15
to the second IR device
10
, and in response, the second IR device
10
responds to the first IR device
5
with an acknowledgement frame
20
.
The half duplex nature of the IRDC is exemplified in
FIG. 2
by an exploded view portion
25
of the first IR device
5
of FIG.
1
. In the exploded view portion
25
, a first transition (T
1
)
30
and a second transition (T
2
)
35
are shown. In T
1
30
, the first IR device
5
(
FIG. 1
) is first receiving
40
(
FIG. 2
) a frame from the second IR device
10
(
FIG. 1
) and then transmitting
45
(
FIG. 2
) an acknowledgement frame to the second IR device
10
(FIG.
1
).
Likewise, in T
2
35
(FIG.
2
), the first IR device
5
(
FIG. 1
) is first transmitting
55
(
FIG. 2
) a frame to the second IR device
10
and then receiving
60
(
FIG. 2
) an acknowledgement frame. At either transition T
1
or T
2
, the first IR device
5
is able only to perform one transmission with the second IR device
10
at a time (i.e. can only perform at half duplex). Simultaneous transmission by both devices is not possible. Thus, throughput suffers since the IRDC is essentially a timed one-way communication.
This limitation is further complicated by the fact that a MTAT standard must be adhered to during the IRDC between the first
5
and second
10
IR devices (FIG.
1
).
MTAT is associated with the minimum time needed between the first reception
40
(
FIG. 2
) of a frame to the transmission
45
(
FIG. 2
) of an acknowledgement frame and is depicted by the dashed box
50
for T
1
30
and dashed box
65
for T
2
35
(FIG.
2
).
In essence, the first IR device
5
(
FIG. 1
) must wait the MTAT
50
(
FIG. 2
) after having received the last byte of a frame from the second IR device
10
(
FIG. 1
) before the transmission
45
(
FIG. 2
) of the acknowledgement frame. In the Infrared Data Association publication titled “Serial Infrared Link Access Protocol” (IrLAP), version 1.1, dated Jun. 16, 1996 (hereby incorporated by reference), Section 6.6.8 provides the MTAT parameter value to be from 0 to 10 microseconds. This MTAT is generally specified by the receiving device, i.e. the second IR device
10
(FIG.
1
).
Thus, the exact time from first reception
40
to first transmission
45
(
FIG. 2
) which the first IR device
5
(
FIG. 1
) must implement must be at least that which was specified by the second IR device
10
during the transmission. If this parameter is not followed, and the first IR device
5
does not wait at least the MTAT, there is a risk that the second IR device
10
will not receive the frame
15
properly (e.g. lose data). Furthermore, if the first IR device
5
waits significantly longer than the MTAT
50
(FIG.
2
), then throughput can be seriously reduced due to the extra delay time during which no data is being transmitted by either device. There is therefore a need to optimize the actual MTAT to match the standard MTAT prescribed.
A similar problem exists at T
2
35
(FIG.
2
). At T
2
, the first IR device
5
(
FIG. 1
) first transmits
55
(
FIG. 2
) the frame to the second IR device
10
(
FIG. 1
) and then receives
60
(FIG.
2
)an acknowledgement frame from the second IR device
10
(FIG.
1
). The MTAT associated with this transition is symbolized by box
65
(FIG.
2
).
The problems associated with the T
2
is that after transmitting
55
the last byte of a frame, the first IR device
5
is allowed a time interval equal to the MTAT to get ready to receive the acknowledgement frame
20
from the second IR device
10
. Thus, the second IR device
10
is not allowed to begin its transmission until this MTAT interval has elapsed. Again, the MTAT parameter is set forth in IrLAP with values ranging from 0 to 10 microseconds. The MTAT for T
2
must in all cases be no greater than that which was specified by the second IR device
10
during the set up or link between the first IR device
5
and the second IR device
10
. Furthermore, minimizing the value of the MTAT
65
is an important design goal because the longer the second IR device
10
is forced to wait before starting its transmission, the more the throughput will be reduced due to the extra delay time during which no data is being transmitted by either device.
Although the key is to optimize the actual MTAT to match the industry parameter, this remains a problem that has not been addressed by conventional IRDC receivers/transmitters and related components. A conventional receiver/transmitter used in IRDC is illustrated in prior art FIG.
3
.
FIG. 3
is a block diagram view of a conventional receiver/transmitter of an IR device used in an IRDC. In prior art
FIG. 3
, the first IR device
5
contains a central processing unit (CPU)
70
, conventional components
75
and a receiver/transmitter
80
. The CPU
70
is used to control the exchange of data among the components of the first IR device
5
. The conventional components
75
are standard control logic and buses used in an IRDC by an IR device, such as those components shown in FIG. 9.0 of the publication (datasheet) “PC16550D Universal Asynchronous Receiver/Transmitter With FIFOs” (UART) dated June 1995, hereby incorporated by reference. The UART is manufactured by National Semiconductor Corporation. The receiver/transmitter
80
corresponds to the PC16550D part of the UART and includes the conventional components
85
depicted in FIG. 5.0 of the UART publication. The conventional components
85
thus include the general registers, control logic, latches, buses and buffers as shown in FIG. 5.0 of the UART publication.
Specifically separated from the conventional components
85
in
FIG. 3
are the receiver FIFO trigger interrupt
90
, receiver FIFO
95
and IDLE interrupt
100
, all of which communicate with one another using buses or similar connection lines in the receiver/transmitter
80
. The receiver FIFO
95
is used to store the characters from a frame received from another IR device. The receiver FIFO trigger interrupt
90
and the IDLE interrupt
100
are methods used by the UART to inform the CPU
70
that characters from a frame are present in the receiver FIFO
95
. In essence, these two methods are used to estimate the proper time to send the characters in the receiver FIFO
95
to acknowledge receipt of the received frame, irrespective of the MTAT. These two methods used by conventional UARTs create serious limitations in optimizing the MTAT of the IRDC.
A first method uses the receiver FIFO trigger interrupt
90
which notifies the CPU
70
when a certain number of characters are present in the receiver FIFO
95
. Usually, this number of characters can be specif
Binzel Charles Philipp
Dorsey Donald Arthur
Jungels Nicholas Francis
Bartusiak Paul J.
Chapa Lawrence J.
Motorola Inc.
Pascal Leslie
Payne David
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