Method of and apparatus for inserting and/or deleting escape...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Reexamination Certificate

active

06249525

ABSTRACT:

The present invention relates to networking systems and to the encoding of datagrams therein and to HDLC (high data link control) and similar packet data processing, being more particularly concerned with the problems of appending cyclical redundancy check characters and the insertion and/or deleting of escape characters on serial data links at high data rates or speeds.
BACKGROUND
Special characters termed flags, may be used to define the points where datagrams are to start and end in transmitted and received data streams.
The methodology of the standard in most common protocols is called the above-mentioned HDLC, defining such flags by a special character called 7e. If the character 7e is part of a received datagram, however, the receiver would not know how to distinguish such a flag within a packet and therefore may erroneously interpret the packet as actually two separate packets on either side thereof. The HDLC protocol, therefore, suggests that if the flag character 7e is within the packet stream, an escape character 7d be inserted and appended with the flag character 7e. In the event, moreover, that the letter 7d is already itself inside the packet stream, a further escape character 7b must be inserted to append with 7d.
On the data transmission end, a capability is provided for thus inserting escape characters for special ACCM (Asynchronous Control Character Map) bytes and/or inter-flag bytes in the data stream. Currently this is achieved on a traditional byte-by-byte basis because at high speeds, the time required to do HDLC functions gets very small. A byte time for an OC48 wire, for example, is 3 nanoseconds making comparing and inserting very difficult. The problems with such mechanisms in encoding these escape characters at the transmitter and in detecting these escape characters in reception at very high speeds has been challenging, if not almost impossible, using this current one byte at a time processing technique. Such can allow data streams up to about 100-200 megabits but beyond that it runs short of time in order to process the escape characters as in the inserting and/or deleting of escape characters, on packets that flow at very, very high speeds well beyond the normal OC12, OC48, OC192 respective 0.622 gigabit, 2.4 gigabit or 10 gigabit rates. The prior art actually uses serial streams of data, converting them into bytes and then operating one byte at a time, providing only an advantage factor of ⅛
th
of the wire speed. If the wire speed is at 1 gigahertz, for example, running at ⅛ the clock is 125 megahertz, and trying to add or delete data at 125 megahertz is a difficult task. It becomes increasingly difficult to process data at 2 bytes at a time or 3 bytes at a time with such conventional techniques.
The present invention, on the other hand, through operating with the input serial data streams divided into smaller groups of data and applied in a parallel fashion, as later detailed, to a multilane highway of input data highway and escape highway matrix busses, now enables the processing of data for HDLC at a much wider bus—instead of just 8 bits, processing at 64, 128, 256, etc. bits at a time, inserting and/or deleting escape characters.
Having successive smaller data groups fed in parallel, means running N×8 as slow as conventional wire speed. With a wire speed of 10 gigabytes and 8 FIFO's, for example, then the 10 gigabytes are divided by 64—the data being processed at the order of 40-50 megahertz. This makes the HDLC coding much simpler, and the same algorithm can then scale at much higher speeds by increasing the number N.
The novel algorithm technique of the invention, indeed, enables processing multiple bytes in but one clock time, and with the clock rate low compared to the data rate.
OBJECT OF INVENTION
An object of the present invention, accordingly, is to provide a new and improved method of and architectural apparatus for the insertion and/or deletion of escape characters into and from data packets and the like at very high data rates for HDLC and similar data processing.
A further object is to provide such a novel apparatus in which an algorithmic technique is employed that enables processing multiple bytes in individual clock times, as distinguished from present—day byte-by-byte serial data processing—i.e. one byte at a time.
Other and further objects will be explained hereinafter and are more fully delineated in the appended claims.
SUMMARY
In summary, however, from one of its important viewpoints, the invention embraces a method of inserting characters in data packets and datagrams therefor on high speed data stream networking links for clocked HDLC data processing, that comprises, interposing a multilane highway matrix of input data and escape character busses between a plurality of input and corresponding output FIFOs; respectively inputting groups of FIFO serial data parallely to successive input data busses of the highway matrix and outputting corresponding groups of FIFO data from the input FIFO multilane highway busses through corresponding output FIFO selectors; comparing data taken from the multilane highway busses with one of inter frame flag, escape, and preprogrammed stored ACCM characters, accordingly logically to control the output FIFO selectors to append a suitable character between appropriate bytes in the data stream; and operating the HDLC clocking at a rate low compared with the said high speed of the data stream.
Preferred and best mode designs and details are hereinafter described


REFERENCES:
patent: 5307355 (1994-04-01), Lauck et al.
patent: 5638370 (1997-06-01), Seconi et al.
patent: 5671223 (1997-09-01), Shachar et al.
patent: 6034957 (2000-03-01), Haddock et al.

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