Patent
1996-12-18
1998-08-11
Voeltz, Emanuel Todd
G06F 945
Patent
active
057940452
ABSTRACT:
A device for creating and analyzing larger symbolic representations without the limitations imposed by available resources of previous devices is disclosed. More specifically, a debugger for debugging a symbolic representation of a program is disclosed. The debugger comprising means for inputting a set of characteristics, means for linking the set of characteristics to the symbolic representation, means for identifying a first portion of the symbolic representation mutually exclusive from the set of characteristics, and means for analyzing a second portion of the symbolic representation for the set of characteristics wherein the second portion being mutually exclusive from the first portion. A method of debugging programs using the debugger, in addition to the resultant debugged program, is also disclosed.
REFERENCES:
U.S. application No. 08/175,059, filed Dec. 29, 1993.
Emerson, E. A. et al., "Automatic Verification Of Finite State Concurrent Systems Using Temporal Logic Specifications," ACM Transactions On Programming Languages and Sytems, Sec. 8(2), Apr., 1986, pp. 244-263.
Aho, Sethi, and Ullman, "Compilers: Principles, Techniques, And Tools," Addison Wesley, 1986.
Schell William Martin
Singh Kanwar Jit
Story Guy Ashley
Subrahmanyam Pasupathi Ananta
Corcoran, III Peter J.
Lucent Technologies - Inc.
Todd Voeltz Emanuel
LandOfFree
Method of and apparatus for efficiently debugging programs given does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of and apparatus for efficiently debugging programs given, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of and apparatus for efficiently debugging programs given will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-401633