Pulse or digital communications – Multilevel – Synchronized
Patent
1996-07-03
2000-03-07
Chin, Stephen
Pulse or digital communications
Multilevel
Synchronized
375376, H04L 2549
Patent
active
060349980
ABSTRACT:
A phase-locked loop included in a reproduce signal processing circuit which as a magnetic recording and reproducing device or the like. The phase-locked loop accurately detects a phase and can be operated at high speed. The phase-locked loop includes a data determining circuit for judging data at individual times from sampled data in a plurality of samples and an estimated data string generating circuit for examining the correlation between each data string and each known phase-locked data string and sequentially generating the known phase-locked data string closet to the data string. A sampling phase is detected by performing an arithmetic operation on the data string estimated by the estimated data string generating circuit and the sampled data.
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patent: 4851932 (1989-07-01), Scheer et al.
patent: 5265125 (1993-11-01), Ohta
patent: 5430768 (1995-07-01), Minuhin et al.
patent: 5459757 (1995-10-01), Minuhin et al.
patent: 5585975 (1996-12-01), Bliss
Hirano Akihiko
Takashi Terumi
Chin Stephen
Ghayour Mohammad
Hitachi , Ltd.
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