Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels
Reexamination Certificate
2000-01-20
2003-12-09
Ngo, Ricky (Department: 2731)
Multiplex communications
Communication techniques for information carried in plural...
Combining or distributing information via time channels
C375S371000
Reexamination Certificate
active
06661811
ABSTRACT:
FIELD OF TECHNOLOGY
The invention relates to a method of correcting timing errors when transmitting isochronous data through a packet based communication network in which at least some of the data packets contain timestamps which indicate to a receiver the time at which the data should be processed and to apparatus for carrying out such a method.
BACKGROUND AND SUMMARY
In digital communication systems, it is common for information, which is to be sent from a transmitting device to a receiving device to be divided into packets. Such packets may be delayed by a finite and varying length of time as they pass through the communication system.
The transmission of isochronous data through a communication system requires the maintenance of an accurate timing relationship between the transmitting device and the receiving device in order to preserve the quality of the services using the communication system. Such isochronous data may for example convey video or audio services. If the communication system fails to uphold the timing relationship between the transmitting device and the receiving device it may be unable to provide an acceptable quality of video and/or audio service at the receiving end of the transmission.
An example of such an application is the transmission of digital audio and/or video signals, which are encoded according to MPEG (Moving Picture Experts Group) standards. The bit clock of the MPEG decoder in the presentation device must run at the same rate as the bit clock in the device that originally encoded the data according to the MPEG standard. In order to achieve this the MPEG Standards require the encoding device to place a timestamp, known as a Program Clock Reference (PCR) or System Clock Reference (SCR), on some of the packets of MPEG data. The decoding device detects and reads the PCR or SCR values, and uses these to send signals to its internal clock in order to control the rate thereof.
Such a timing relationship may be maintained if the transmitting device transmits the packets of data at the same rate as said packets are required to be processed by the real-time application at the receiving end of the communication system, and the length of time by which each packet is delayed during transmission through the communication system is the same for every packet.
However, in practical digital communication systems, such as IEEE1394, Hiperlan (High Performance Radio Local Area Network), ATM (Asynchronous Transfer Mode), or UMTS (Universal Mobile Telecommunications System), the length of time for which each packet is delayed may vary from packet to packet. In the case of transmission of MPEG encoded data, such a variation in transmission delay results in erroneous correction signals being supplied to the internal clock of the decoder.
One method which has been proposed to overcome the effects of the transmission jitter is to use a buffer in the receiving device, into which buffer the received packets destined for the application are temporarily stored. The packets are then taken from the buffer to the application part of the receiving device, or to the next stage of a communication system, at a rate determined by an algorithm which has the amount of data contained in the buffer as one input. In the absence of additional features, this approach has drawbacks that may include the size and hence the cost of the required buffer and the level of accuracy of the rate of data output from the buffer.
Another proposed method, which claims to overcome the problem of transmission jitter, is disclosed in U.S. Pat. No. 5,790,543. This publication discloses the use of a further clock in the receiving device that is independent of the transmission clock, that is the receiver clock is not synchronised with the transmitter clock. The difference between the timestamps of successive packets, representing the difference in expected times of arrival of the successive packets, is subtracted from the difference between the values of the further independent clock at the instants at which the packets arrived. This latter difference is then referred to as the actual interarrival time of the packets. The result of this subtraction process is claimed to represent the jitter incurred by the data packets during transmission through the communication system. The present applicant, however, believes that this procedure will not result in accurate correction of any jitter in the transmitted data.
Another method of overcoming the transmission jitter when a separate clock is contained in each device in the communication system is to maintain these separate clocks in synchronism using packets transmitted via the communication system. To achieve this a further timestamp may be added by a transmitting device to some or all of the isochronous data packets that represents the future value of the separate clock in the transmitting device a pre-determined interval after the time at which the data packet is ready for transmission. Such a timestamp may then be detected and read by the receiving device. The correct, jitter-free time at which the data packet should be delivered to the application is the time at which the value of the timestamp in the packet is equal to the value of the synchronised clock in the receiving device. The predetermined interval must be such that the timestamp corresponds to a time no earlier than the current time at the receiver. This method may be used, for example, when isochronous data is transmitted on an IEEE1394 bus using the Common Isochronous Packet (CIP) format defined in IEC61883 and illustrated in FIG.
1
. Each device on the IEEE1394 bus contains a totally independent free running 24.576 MHz clock, for which one cycle lasts 40.69 ns. This period is known as one “tick”. Each device which is capable of handling isochronous data on the IEEE1394 bus also contains a Cycle Time Register (CTR), whose format is shown in
FIG. 2
, which contains a 32-bit representation of current time. This register is updated every 40.69 ns by the 24.576 MHz clock. Furthermore, one of the devices on the IEEE1394 bus is specified as the “Cycle Master” by a mechanism defined in IEEE1394. To maintain synchronism between the CTRs of all the devices on the IEEE1394 bus a “Cycle Start” packet is transmitted by the Cycle Master after every 3072 ticks on average. The “Cycle Start” packet contains the current value of the CTR in the Cycle Master. Reception of a Cycle Start packet by a non-Cycle Master device, which contains a CTR, is interpreted as a command to write the value contained in the Cycle Start packet into the CTR of the receiving device. Isochronous data packets, which are transmitted from a transmitting device on the IEEE1394 bus in the CIP format, are labelled with a timestamp. This timestamp represents the sum of a fixed offset and the value of the CTR in the transmitting device at the time at which the packet is presented for transmission by the encoder or other source of isochronous data. When the receiving device receives such a packet, it holds the packet in a buffer until the value of the timestamp of the packet is equal to the value of the CTR in the receiving device. At that time, the packet may be processed by the application in the receiving device. It is evident that this approach depends on the absolute values of the CTRs being equal in all isochronous-capable devices on the IEEE1394 bus and also on the value of the fixed offset, which is added to the timestamps, being greater than the total transmission delay between the transmitting device and the receiving device. These dependencies become a serious drawback when different IEEE1394 buses are connected together by a communication bridge, for example according to the IEEEp1394.1 standard. In this latter example, although the CTRs in all the isochronous-capable devices on a particular IEEE1394 bus are synchronised both in frequency and in absolute value according to the CTR in the Cycle Master on that particular bus, the absolute values of the CTRs on different buses may nonetheless not be equal. Furthermore, an additional
Koninklijke Philips Electronics , N.V.
Ngo Ricky
Swickhamer Christopher M
LandOfFree
Method of and apparatus for communicating isochronous data does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of and apparatus for communicating isochronous data, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of and apparatus for communicating isochronous data will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3093966