Active solid-state devices (e.g. – transistors – solid-state diode – Organic semiconductor material
Reexamination Certificate
2009-05-29
2010-12-28
Luu, Chuong A (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Organic semiconductor material
C257S077000, C257S419000, C257SE51040
Reexamination Certificate
active
07858979
ABSTRACT:
A method of forming an aligned connection between a nanotube layer and a raised feature is disclosed. A substrate having a raised feature has spacers formed next to the side of the raised feature. The spacers are etched until the sidewalls of the raised feature are exposed forming a notched feature at the top of the spacers. A patterned nanotube layer is formed such that the nanotube layer overlies the top of the spacer and contacts a side portion of the raised feature in the notched feature. The nanotube layer is then covered with an insulating layer. Then a top portion of the insulating layer is removed to expose a top portion of the etched feature.
REFERENCES:
patent: 6645861 (2003-11-01), Cabral et al.
patent: 2005/0122775 (2005-06-01), Koyanagi et al.
patent: 2007/0029612 (2007-02-01), Sandhu
Bertin Claude L.
Konsek Steven L.
Meinhold Mitchell
Neville Christopher L.
Rueckes Thomas
Doan N.
Luu Chuong A
Nantero Inc.
Wilmer Cutler Pickering Hale and Dorr LLP
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