Coded data generation or conversion – Sample and hold – Having variable sampling rate
Reexamination Certificate
2007-05-15
2007-05-15
Jeanglaude, Jean Bruner (Department: 2819)
Coded data generation or conversion
Sample and hold
Having variable sampling rate
C345S213000, C348S537000
Reexamination Certificate
active
11306638
ABSTRACT:
A method of adjusting a sampling condition to generate a sampling clock in an analog to digital converter includes performing an analog to digital conversion on an analog input signal to thereby produce a digital sampled signal having a plurality of samples; calculating a difference value between two adjacent samples in the digital sampled signal; comparing the difference value with a threshold; adding the difference value into a sum of differences value if the difference value is greater than the threshold; and generating the sampling clock for the analog to digital converter according to the sum of differences value.
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Chou Yu-Pin
Chu Hung-Jen
Gong Jin-Sheng
Kuo Yu-Pin
Hsu Winston
Jeanglaude Jean Bruner
Realtek Semiconductor Corp.
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