Method of addressing a random access memory as a delay line, and

Details Method of addressing a random access memory as a delay line, and Method of addressing a random access memory as a delay line, and

1986-02-03

1988-07-12

Eng, David Y.

Boots, shoes, and leggings

365194, G06F 1200

Patent

active

047574690

ABSTRACT:
A random access memory is used to realize a sequence of delay lines (40, 46, 48, 50). The delay lines are linked so that a common end point of two delay lines can be addressed in a read/modify/write operation. Furthermore, the address step between two successive data elements of the delay line is increased, so that the new address must be calculated modulo the length of the consecutive zone reserved for the delay lines. It has been found that in many cases the incrementation step between the various read addresses has a value which can be expressed in a number of bits which is smaller than the number of bits necessary to express the length of the consecutive memory zone itself.

REFERENCES:
patent: 4101973 (1978-07-01), Tromp
patent: 4213191 (1980-07-01), Gemp
patent: 4511966 (1985-04-01), Hamada
patent: 4608554 (1986-08-01), Blair
patent: 4689738 (1987-08-01), van Wijk

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