Method, memory system and memory module board for avoiding...

Wave transmission lines and networks – Coupling networks – With impedance matching

Reexamination Certificate

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C326S030000, C333S247000

Reexamination Certificate

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06882241

ABSTRACT:
A signal line of a data bus includes first wires on a first board and a second wire on a second board. The second board is installed on the first board to connect the first and second wires with each other in series to establish the signal line. Semiconductor devices are connected with the second wire. In such data bus system, impedance of the second wire is decided according to additional capacitance of the semiconductor device on the second board in order to harmonize impedance of the first board with impedance of the second board.

REFERENCES:
patent: 6392897 (2002-05-01), Nakase et al.
patent: 6680623 (2004-01-01), Hirai et al.
patent: 6686762 (2004-02-01), Leddige et al.
patent: 20010021105 (2001-09-01), Ikeda
patent: 07-262776 (1995-10-01), None
patent: 11-251539 (1999-09-01), None
patent: 2000-122761 (2000-04-01), None
patent: 2001-183422 (2001-07-01), None
patent: 2001-184297 (2001-07-01), None
patent: 2001-256772 (2001-09-01), None
patent: 2001257018 (2001-09-01), None
Article from Interface, Apr. 1999, pp. 183-193.

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