Method for writing data to a semiconductor memory comprising...

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...

Reexamination Certificate

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Details

C365S189050, C365S230060

Reexamination Certificate

active

06990040

ABSTRACT:
An input data register for latching write data is arranged in a position near a memory cell array of a memory core section. The input data register is arranged on the upstream side of a data path used for writing data into a memory cell. Write data input to a data pin which is arranged in the end position on the downstream side is latched in the input data register via a data input buffer, serial/parallel converting circuit and write data line. Data latched in the input data register is written into a memory cell via a DQ write driver, data line pair, I/O gate and bit line pair in a next write cycle.

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