Method for wafer level packaging and fabricating cap structures

Details Method for wafer level packaging and fabricating cap structures Method for wafer level packaging and fabricating cap structures

2006-06-26

2009-10-06

Lee, Jae (Department: 2895)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Insulative housing or support

C438S106000, C438S116000, C438S121000, C257S704000, C257SE23183, C257SE23181, C257SE23192, C257SE23193, C257S684000, C257S433000, C257S434000, C257S678000, C257S685000, C257S731000

Reexamination Certificate

active

07598125

ABSTRACT:
A cap wafer with cavities is etched through areas not covered by a patterned photoresist to form a plurality of openings. The cap wafer is bonded to a transparent wafer at the surface having the cavities and is segmented around the cavities to form a plurality of cap structures. The cap structures are hermetically sealed to a device wafer to form hermetic windows over devices and pads located on the device wafer.

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Wolf, Stanley, Tauber, Richard N., Silicon Processing for the VLSI Era, vol. 1: Process Technology, Lattice Press, Copyright 1986, p. 409.

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