Data processing: measuring – calibrating – or testing – Measurement system – Performance or efficiency evaluation
Reexamination Certificate
2006-07-25
2006-07-25
Bui, Bryan (Department: 2863)
Data processing: measuring, calibrating, or testing
Measurement system
Performance or efficiency evaluation
Reexamination Certificate
active
07082385
ABSTRACT:
A method for verifying optimization of processor link. First, an initial bus width and an initial bus frequency of a bus coupled between a CPU and a Northbridge are set, such that the bus operates at the initial bus width and the initial bus frequency. Next, a read request for a Southbridge is generated. Next, a bus disconnection signal is output by the Southbridge to disconnect the CPU and the Northbridge when the Southbridge receives the read request. A timer is initialized for calculating an elapsed time value and an optimization verification signal at a first voltage level is generated. Next, a bus connection signal is output by the Southbridge when the elapsed time value reaches a predetermined value. Next, the voltage level of the optimization verification signal is transformed to a second voltage level. Finally, the CPU and the Northbridge are reconnected by the bus according to the bus connection signal, such that the bus operates at another bus operating bus width and another bus operating frequency.
REFERENCES:
patent: 6523128 (2003-02-01), Stapleton et al.
patent: 6597620 (2003-07-01), McMinn
patent: 6903583 (2005-06-01), Habib et al.
patent: 2005/0093524 (2005-05-01), Hsu
Hsu Ming-Wei
Peng Sheng-Chang
Bui Bryan
Rabin & Berdo P.C.
Via Technologies Inc.
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