Method for using complete-1-distinguishability for FSM equivalen

Details Method for using complete-1-distinguishability for FSM equivalen Method for using complete-1-distinguishability for FSM equivalen

1997-04-22

2000-03-07

Teska, Kevin J.

G06F 1560

Patent

active

060351098

ABSTRACT:
The Complete-1-Distinguishability (C-1-D) property is used for simplifying FSM verification. This property eliminates the need for a traversal of the product machine for the implementation machine and the specification machine. Instead, a much simpler check suffices. This check consists of first obtaining a 1-equivalence mapping between the states of the two machines, and then checking that it is a bisimulation relation. The C-1-D property can be used directly on specifications for which it naturally holds. This property can be enforced on arbitrary FSMs by exposing some of the latch outputs as pseudo-primary outputs during synthesis and verification. In this sense, the synthesis/verification methodology provides another point in the tradeoff curve between constraints-on-synthesis versus complexity-of-verification.

REFERENCES:
patent: 5331568 (1994-07-01), Pixley
patent: 5491639 (1996-02-01), Filkorn
patent: 5513122 (1996-04-01), Cheng
patent: 5740070 (1998-04-01), Nishimoto

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